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Programmable Cellular Logic Arrays

机译:可编程蜂窝逻辑阵列

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In recent years, technological advances have provided the designer of computing hardware with the ability to batch-fabricate large numbers of logic components on a single semiconductor slice. Numerous researchers have investigated the synthesis of various kinds of digital logic by using arrays of identical cells. The dissertation considers cellular arrays whose individual cell functions are determined by parameter flip-flops and logic gates in the cell, rather than by a physical customizing operation during manufacture. Potential advantages of this technique include functional variability after manufacture, more efficient testing, and enhanced failure tolerance. Arrays may be classified according to their generality, i.e., the number and range of the tasks which they are designed to perform. Two significantly different examples of low-generality arrays are presented and analyzed. A new cell schema is introduced which exhibits properties important in the synthesis of high-generality functions. Techniques are presented for improving the match between an array design and the target class of tasks. (Author)

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