The Application of Correcting Codes to Improve the Reliability of Combination Logic Circuits

摘要

The use of binary and generalized single-error correcting codes to synthesize decoders for redundant combinative logic circuits is examined. Given a logic circuit made up of OR-NOT elements that realizes the logic functions a logic circuit is synthesized with OR-NOT elements that will correct any single error using a Hamming code. As another example, a similar circuit is synthesized using a generalized code. A decoder for three two-output subcircuits is also synthesized using a generalized code. The use of error-correcting codes increases reliability only when the logic circuits are rather complex.