An Investigation into the Extension of Redundancy Techniques

摘要

A new redundancy technique termed Dotted Logic is presented. Critical input errors are eliminated by joining together the outputs of NAND gates and NOR gates. The remaining subcritical errors are corrected by introducing redundant inputs to each gate or module. Two different schemes, Dotted Alternating and Dotted Identical, are described and compared with existing error correcting techniques. It is shown that these new methods are more reliable and less expensive than Quadded or TMR networks. In addition to correcting single faults, Dotted schemes are easily extended to cover multiple faults. Methods for initial failure determinations for Dotted schemes are proposed. Finally, it is proven that any general function can be made more reliable by Dotting. In addition, rules are given for applying Quadded Logic to any of these general functions. (Author)