Simulation of AADC Simplex and Multiprocessor Operation

摘要

Simulation of a proposed naval Advanced Avionic Digital Computer (AADC) has been underway to arrive at architectures which efficiently meet the needs of expected program workloads. Models of avionic program workloads have been derived from various sources and used to drive these simulations . These models consist of sets of nearly independent program modules which effect periodic, known demands on system resources. Simplex and multiprocessor configurations of the AADC have been modeled, and certain features of proposed AADC executive operation have been incorporated into these models. Guided by previous simulation work, both nonpaged and paged operating systems with multiprogrammed memories have been simulated. (Author)