The Design of Multiple-Valued Asynchronous Sequential Circuits

摘要

This thesis examines several areas which are vital to the development of multiple-valued asynchronous sequential circuits. An existing method of designing multi-valued combinational circuits is analyzed in detail, and modifications are presented which extend the applicability of this design to more functions. Storage devices are also examined, and a device is presented which is simple to construct and is useful in the construction of asynchronous circuits. The problem of state assignment for multiple-valued circuits is studied in depth. Methods which minimize the number of state variables are presented, and then analogy to binary row-set and shared-row assignments is demonstrated. An algorithm for producing unicode single transition time assignments is developed, and is shown to produce optimal solutions. Various refinements on this method and other simpler but non-optimal methods is described.