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Increasing the Operating Speed of Integrated Circuits Made of MOS Transistors.

机译：集成电路由mOs晶体管组成。

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作者
Zelentsov, A. V.; Gusakov, V. M.;
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年度 1975
页码 1-12
总页数 12
原文格式 PDF
正文语种 eng
中图分类工业技术;
关键词
Metal oxide semiconductors; Integrated circuits; Bipolar transistors; USSR; Metal oxide transistors; Translations;

机译：金属氧化物半导体;集成电路;双极晶体管;苏联;金属氧化物晶体管;翻译;

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机译：改进的 $ hbox {All-MgB} _ {2} $ 切换触发器电路，提高了工作速度，温度范围
2. A New Equivalent Circuit Model for MIS Interconnects in Skin Effect Mode in High Speed Integrated Circuits on Lossy Substrate [J] . Avanish Bhadauria International Journal of Advancements in Technology . 2010,第2期

机译：有损基片上高速集成电路中趋肤效应模式下MIS互连的等效电路模型
3. Circuit Model for Interconnect Crosstalk Noise Estimation in High Speed Integrated Circuits [J] . A. B. Kalpana, P. V. Hunagund International journal of electrical engineering and technology . 2013,第2期

机译：高速集成电路中互连串扰噪声估计的电路模型
4. Aging mechanisms in strained Si/high-k based pMOS transistors. Implications in CMOS circuits [C] . Martin-Martinez J., Amat E., Ayala N., Proceedings of the 8th Spanish Conference on Electron Devices . 2011

机译：基于应变Si / high-k的pMOS晶体管的老化机制。对CMOS电路的影响
5. The simulation of worst-case operating conditions for integrated circuits operating in a total dose environment. [D] . Bhuva, Bharat Laxmidas. 1987

机译：在全剂量环境中运行的集成电路的最坏情况运行条件的仿真。
6. Water-Gated n-Type Organic Field-Effect Transistorsfor Complementary IntegratedCircuits Operating in an Aqueous Environment [O] . Rossella Porrazzo, ⊥, Alessandro Luzio, 2017

机译：水控n型有机场效应晶体管互补综合在水环境中运行的电路
7. Breaking the power-delay tradeoff: design of low-power high-speed MOS current-mode logic circuits operating with reduced supply voltage [O] . Stéphane Badel, Yusuf Leblebici 2007

机译：打破功耗延迟的折衷方案：设计低电源电压的低功耗高速MOS电流模式逻辑电路
8. Process-Oriented,High-Injection Circuit Models for Integrated Bipolar Junction Transistors. Part II. Volume II. [R] . choma,john jr 1978

机译：用于集成双极结晶体管的面向过程的高注入电路模型。第二部分。第二卷。

Increasing the Operating Speed of Integrated Circuits Made of MOS Transistors.

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