Check Sum Methods for Test Data Compression.

摘要

Some recent commercially-available testers for logic circuits use a technique called transition counting which is characterized by substantial compression of the test response data as well as very simple test equipment. This paper examines whether there other useful test data compression methods, and how can they be evaluated analytically. A class of testing methods called check sum (CS) tests is introduced which includes both conventional testing and transition count testing as special cases. A CS test is defined by a check sum function whose range is a set of integers, CS tests are classified by two parameters: m which is a measure of data compression and tester complexity, and which is a measure of fault resolution capability. These parameters allow a priori evaluation of testing cost and performance. A general fault model called the M-fault is introduced to facilitate this evaluation. Necessary and sufficient conditions for a CS test to be able to detect or distinguish M-faults are derived. The characteristics of some special types of CS tests are analyzed, in particular, those of the simplest CS tests which are called zero-memory tests and are represented by one's counting. It is shown that zero-memory tests have some unique and potentially useful properties.