A Paged Hardware Associative Memory.

摘要

A hardware associative memory is a device that can be employed to enhance the performance of computers. The associative memory described in this report is a paged system which exploits the speed inherent in parallel (random) access capabilities of software associative memories and the storage capacity of lower cost but slower memories. The described system is designed to run as peripheral equipment to a host computer which issues information requests to the memory system. These requests are of a form that permits one to conveniently manipulate information embedded in graph structures. A paged associative memory system is an attractive method of implementing associative memory capabilities. This approach is a cost effective, flexible alternative to other approaches such as software simulations or non-paged associative memory implementations.