A Distributed Processor Architecture for BMD Signal and Data Processing Applications

摘要

The signal processor in large Ballistic Missile Defense (BMD) systems includes a subsystem, known as the Post Processor, which selectively reduces the received data to rates which are appropriate for the subsequent general purpose Data Processing System. This report presents an analysis of the processing requirements for the Post Processor and describes a multiprocessor, multibus architecture which appears well matched to the processing and throughput requirements. (Author)