Development of a Methodology for Verifying Military Computer Family Built-in-Test Performance Specifications

摘要

A previous study has addressed the identification of built-in-test (BIT) techniques for the Military Computer Family (MCF). In that study, appropriate BIT techniques were identified based upon an assumed fault population. A model was developed to predict where in the system these faults are most likely to occur. Based upon this model, a rationale was developed for deploying built-in-test resources and a unified BIT approach for MCF was recommended. A later study focused on the identification of relevant BIT requirements for Military Computer Family form, fit and function (F3) specifications. The present study was concerned with extending the BIT performance assessment methodology for verifying MCF built-in-test performance and the application of this methodology to a particular member of the Military Computer Family. The recommended approach is to describe MCF functional modules using ISP language descriptions. The PDP-11/70 member was selected as representative. The PDP-11/70 modules were verified to insure their proper functional behavior and the previously recommended BIT approaches were described in ISP and applied to these modules. In order to validate BIT performance for modules, a functional fault model was developed.