VLSI Based Multiprocessor Communications Networks

摘要

An analysis of two system control methodologies, synchronous (i.e. based on the presence of a central clock) and asynchronous (i.e. self-timed, no clock is present) is presented in the context of interconnection networks (and one dimensional systolic array design). The interconnection networks of interest are oriented towards use in a multiprocessor environment. Other issues related to network design, such as pin limitations and partitioning, are considered, and an improved type of Delta network, the reinforced Delta network is defined and its properties studied. (Author)