Simulation of Systolic Networks with a Syntax Directed Solver for Systems of Sequence Equations

摘要

The main objective of this paper is to supplement a model that was previously suggested for the verification of systolic networks. A simple language is presented to express the system of sequence equations that models the operation of the network. Then a syntax directed interpreter is developed to solve this system for specific forms of the inputs and to produce the corresponding outputs. This technique for the verification of a certain computation on a systolic network is equivalent with the simulation of its execution. (Author)