Exploration of Nanometer Cognitive Reasoning Very Large Scale integration (VLSI) Computer Architecures.

摘要

The objectives of this work were to design, develop, and evaluate support for the design of low-power hardware computer architectures at the Very Large Scale Integration (VLSI) level. The objectives were realized by achieving complete design flow integration with commercial and open-source Electronic Design Automation tools. The design flow takes as inputs a high-level system- level architecture description, along with area, critical path delay, and power dissipation constraints. Based on the System on Chip architecture description and design constraints, the tools automatically generate synthesizable Hardware Descriptive Language (HDL) models, embedded memories, and custom components to implement the specified VLSI architecture. Simulation results showed significant improvement over previous approaches with respect to power dissipation and leakage reduction.