Avalanche-Induced Drain-Source Breakdown in Silicon-on-Insulator n-MOSFET's

摘要

An avalanche-induced drain-source breakdown model is proposed for n-channel silicon-on-insulator MOSFET's. This model includes the effects of floating substrate and finite silicon thickness. The calculated I-V characteristics in the breakdown region agree well with the experimental results. The results show that 1) the drain-source breakdown voltage of SOI n-MOSFET's have higher breakdown voltage than their bulk-silicon counterparts at large gate bias, but lower breakdown voltage at small gate bias.