VLSI Design of a Radix-4 Floating Point FFT Butterfly.

摘要

Cyclic Spectrum Analysis is used to exploit the cyclostationary properties of signals and systems. Implementing such a system will require high speed arithmetic processing. Investigations into high speed arithmetic and FFT design are conducted. Integrated circuits of a 45 MHz floating point multiplier, adder, and rate-1/4 radix-4 FFT butterfly, implemented with a 20-bit word size, are presented using the Genesil Silicon Compiler.