Cache Design to Exploit Structural Locality

摘要

A design and VHDL implementation of a content-addressable memory (CAM) to exploitstructural locality is the subject of this research. The concept of structural locality is that memory locations are referenced in the same order as they were previously referenced. Therefore, if memory locations that exhibit structural locality can be made available to the CPU (Central Processing Unit) through a fast data store, an increase in speed of the computer system can be realized. The CAM's purpose is to store memory references in the order they were used by the CPU and prefetch these locations to a smaller on-chip cache. The CAM uses a FIFO circular buffer algorithm to store the memory references. When the CPU references a location that is stored in the CAM, the CAM prefetches memory locations in a FIFO manner, thus allowing the on-chip cache to capture structural locality into its memory. Basic digital logic circuits were implemented in VHDL and were the building blocks for the cache model. From these, the controller, which controls the prefetching of structural locality, was then integrated onto the chip model containing a fully-associative CAM array.