Rapid and Accurate Timing Simulation of Radiation-Hardened DigitalMicroelectronics Using VHDL

摘要

This dissertation presents the development of a fast, accurate, timing simulationcapability based on VHSIC Hardware Description Language (VHDL) without the use of back annotation of timing delay information. This VHDL-based timing simulator is intended for use with radiation-hardened microelectronics in simulating timing of circuit operation in pre-radiation, post-radiation (1 Mrad(Si) total dose), and ionizing dose radiation environments. Development of the timing models are presented. The implementation of the timing models are incorporated into a VHDL library composed of basic logic gates and flip-flops. Simulations of complex circuits were run in SPICE and VHDL to assess the timing accuracy and simulation run time of the VHDL-based timing simulator versus SPICE. Results of the simulations are presented. Final evaluation of the simulator included testing of a microprocessor control unit. In all cases, the VHDL-based simulation ran over