Mission Critical Failure Effects Analysis Using Quantitative Techniques

摘要

This report addresses the problem of assessing the criticality of faults in alarge digital system. In particular, it addresses simulation-based methods for determining the effectiveness of built-in-test. The approach is based on automated fault injection in a VHDL model of the system, and statistical analysis of the resulting behavior of the system. The behavioral entities of the VHDL model would correspond to Line Replaceable Units (LRIJs) or Line Replaceable Modules (LRMs). This report provides the top level design requirements and rationale for the detailed design of this capability.