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Resistor-logic demultiplexers for nanoelectronics based on constant-weight codes

机译:基于恒权码的纳米电子电阻器逻辑多路分解器

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摘要

The voltage margin of a resistor-logic demultiplexer can be improved significantly by basing its connection pattern on a constant-weight code. Each distinct code determines a unique demultiplexer, and therefore a large family of circuits is defined. We consider using these demultiplexers for building nanoscale crossbar memories, and determine the voltage margin of the memory system based on a particular code. We determine a purely code-theoretic criterion for selecting codes that will yield memories with large voltage margins, which is to minimize the ratio of the maximum to the minimum Hamming distance between distinct codewords. For the specific example of a 64 X 64 crossbar, we discuss what codes provide optimal performance for a memory.
机译:电阻逻辑多路分解器的电压裕度可以通过将其连接模式基于恒定权重代码来显着提高。每个不同的代码确定一个唯一的解复用器,因此定义了一大类电路。我们考虑使用这些解复用器来构建纳米级纵横制存储器,并根据特定代码确定存储系统的电压裕度。我们确定用于选择将产生具有大电压裕量的存储器的代码的纯粹代码理论标准,这将最小化不同代码字之间的最大汉明距离与最小汉明距离之比。对于64 X 64交叉开关的特定示例,我们讨论了哪些代码可为内存提供最佳性能。

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