SYNERGISTIC DIGITAL PREDISTORTER BASED ON A LOW MEMORY POWER AMPLIFIER FOR WIDEBAND LINEARIZATION

摘要

We investigate on linearization performance of a digital predistortion (DPD) linearization technique based on the low memory power amplifier (PA) for wideband signals. The low memory PA is implemented using a 90W PEP LDMOSFET at 2.14 GHz, and an envelope short matching topology is applied at the active ports to minimize memory effects. To explore memory effects of the implemented amplifier, the amplifier is tested through two-tone signals (up to 20 MHz tone spacing). The proposed DPD technique is compared with DPD technique based on a PA exhibiting serious memory effects for a forward-link WCDMA 3FA signal with 15-MHz bandwidth. The experimental result shows that the proposed DPD scheme has better linearization performance than the conventional digital predistorter and lower computational complexity over the conventional wideband digital predistorters.