Use ESL synthesis techniques to replace dedicated DSPs with FPGAs

摘要

During the last few years, the performance and capacity of field programmable gate arrays (FPGAs) has increased dramatically. At the same time, the cost of performing the basic digital signal processing (DSP) operations, such as multiply and add, per unit of time in FPGA chips has decreased dramatically. During the same period, synthesis tools have evolved to the point where complicated DSP modules and even complete subsystems can be described in a high-level language such as C++. These tools take the high-level description and synthesize it into an ASIC or FPGA, which is tailored to the performance requirements of the design's implementation.