FPGA Based Walsh and Inverse Walsh Transforms for Signal Processing

摘要

In this paper, we design and implement a set of Walsh transform and inverse Walsh transforms for signal processing. The Walsh and inverse Walsh transforms are designed to produce correct results for any input data combinations by providing sufficient word lengths at every steps of the design. Addition, subtraction and dyadic convolution processes have been chosen to demonstrate the performance of the designs. Detail word lengths designs in order to minimize the circuits are presented. It is found that the proposed Walsh transform structure is superior to many of the reported results when it is implemented on FPGAs in terms of area and speed.