A Neuro-Symbolic Language for monotonic and non-monotonic parallel logical inference by means of artificial neural networks (ANNs) is presented. Both the language and its compiler have been designed and implemented in order to translate the neural representation of a given problem into a VHDL software, which in turn can set devices such as FPGA. The result of this operation leads to an electronic circuit that we call NSP (Neuro-Symbolic Processor).
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