INTERCONNECT DESIGN AND SYNTHESIS IN HIGH SPEED PRINTED CIRCUIT BOARDS AND MULTI-CHIP MODULES

摘要

Computer system clocks are increasing conservatively by a factor of two every year from 100 MHz in 1993-94 to about 1 GHz by the later part of the decade. Intel's Pentium processor operates at 70-100 MHz clock rate and later versions are expected to run at significantly higher clock rates, DEC's Alpha-APX microprocessor runs at 100-200 MHz and 1-2 GHz versions are planned for later releases, Power PC clock rates are also in the same range, and Fujitsu and NEC also expect to reach clock rates of their Sparc processors in 1 GHz range by 1996. Similarly, data rates of 2 GB/s or more are common in digital communication systems such as PCN (Personal Computer Network), LAN (Local Area Network), WAN (Wide Area Network), Cellular and Optical Fiber systems. Three frequency bands-902-928 MHz, 2400-2483.5 MHz and 5725-5850 MHz, are recently assigned by FCC for these applications. The signal edge rates or the slew rate in these systems are significantly higher, which in return means design management at significantly high frequencies, typically in the range of several GHz. According to a recent study, 50% of super computer designers, 30% of test equipment designers, 35% of mainframe computer designers, and 26% of RISC computer designers are designing systems with the highest digital clock rate above 100 MHz.