Design of Wideband Linear Voltage-to-Current Converters

摘要

This paper proposes a voltage-to-current converter with nested feedback loop configuration to achieve high loop gain without reducing the bandwidth. Simulation results using 0.18-μm CMOS process parameters show that the proposed circuit has a good linearity performance. The simulated bandwidth is 350 MHz. The THD improvement of the proposed circuit is more than 60 dB compared to the one of a common gate circuit under a same total current consumption of 10.4 mA.