An Efficient Routing Algorithm for Symmetrical FPGAs Using Reliable Cost Metrics

摘要

This paper presents a new performance and routability-drivenrouting algorithm for symmetrical array-based field-programmable gatearrays (FPGAs). The contribution of our work is to overcome one ofthe most critical limitations of the previous routing algorithms:inaccurate estimations of routing density which were too general forsymmetrical FPGA. To this end, we devised new routing densitymeasures that are directly linked to the structure (switch block) ofsymmetrical FPGA, and utilize them consistently in global anddetailed routings.