Complex M-Spotty Byte Error Control Codes

摘要

Spotty byte error control codes are very effective for correcting / detecting errors in semiconductor memory systems using recent high-density RAM chips with wide I/O data, e.g., 8, 16, or 32bits. A spotty byte error is defined as t-bit errors within a byte of length b-bit, where 1 ≤ t ≤ b, and denoted as t/b-error. This paper proposes a new error model of two spotty byte errors occurring simultaneously, i.e., t/b-error and t′/b-error, where t ≠ t′, called complex spotty byte errors. This paper presents two complex m-spotty byte error control codes, i.e., S_(t/b)EC-(S_(t/b)+S_(t′/b))ED codes which correct all single t/b-errors and detect both t/b-errors and t′ /b-errors simultaneously, and (S_(t/b)+S_(t′/b))EC codes which correct both single t/b-errors and single t′ /b-errors simultaneously. This paper also presents practical examples of the codes with parameter t′ = 1, that is, S_(t/b)EC-(S_(t/b)+S)ED codes and (S_(t/b)+S) EC codes which require smaller check-bit length than the existing Single t/b-error Correcting and Double t/b-error Detecting (S_(t/b)EC-D_(t/b)ED) codes and the Double t/b-error Correcting (D_(t/b)EC) codes, respectively.