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A charge-integration pixel readout chip features IR-drop effect mitigation by distributed LDOs

机译:电荷积分像素读出芯片具有分布式 LDO 的 IR 压降效应抑制功能

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HYLITE (High dYnamic range free electron Laser Imaging deTEctor) is a chargeintegration pixel detector readout chip, which is designed for SHINE (Shanghai high repetition rate XFEL and extreme light facility). The targeting pixel array of a full-size chip is 128 × 128 with a pixel pitch of 100 μm. The dynamic range of HYLITE is 1 ~ 10000 photons at 12 keV, and the frame rate is 10 kHz. Large array size, high dynamic range, and high readout speed result in a big challenge of large power consumption and a significant IR-Drop effect. We implemented HYLITE0.2, which is the second prototype chip fabricated in a CMOS 130 nm process. Compared with HYLITE0.1, HYLITE0.2 aims to implement a full-function chip with a further shrunk pixel size, while the foreseen problem of severe IR-Drop effect of the full-size chip must be solved. To mitigate the IR-Drop effect, we proposed a novel architecture of distributed in-array Low-Dropout Regulators (LDOs). The pixel array consists of 16 × 24 pixels, and the full functionality was implemented within a pixel pitch of 100 μm. Measurements show that pixels powered by the proposed architecture work well, and the gain gradient of those pixels is 31.8% of the pixels powered by the conventional architecture.
机译:HYLITE(高动态范围自由电子激光成像探测器)是一个chargeintegration像素探测器读出芯片,这是专为(上海高重复率XFEL和闪耀极端的光设备)。数组的一个全尺寸的芯片是128×128100μm的像素间距。HYLITE是1 ~ 10000光子12凯文,和帧率是10 kHz。动态范围和高读出速度导致大功耗和一个巨大的挑战重要的ir降的效果。HYLITE0.2,第二芯片原型CMOS 130海里出来的过程。与HYLITE0.1 HYLITE0.2旨在实现一个全功能芯片,进一步减少像素大小,而预见的严重问题ir降的影响大小的芯片必须解决了。提出了一种新颖的分布式的体系结构数组中低压差监管者(ldo)。数组包含16×24像素,和完整的功能是实现在一个像素距100μm。由提出的架构工作,和获得这些像素的梯度,是31.8%的由传统的像素体系结构。

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