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A 28 GHz front-end for phased array receivers in 180 nm CMOS process

机译:一个28 GHz前端,用于在180 nm CMOS过程中分阶段阵列接收器

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摘要

In this paper, a receiver front-end in 180 nm CMOS operating at 28 GHz is presented. The receiver front-end consists of a cascade low-noise amplifier (LNA) with two gain stages and a current-bleeding active mixer with tunable loads. By embedding a quadrature coupler into the mixer, the circuit delivers in-phase and quadrature outputs. The proposed architecture avoids the traditional I/Q implementation by process-sensitive quadrature voltage control oscillators (VCOs) with larger power consumption at high frequencies. The adopted transformers and inductors are optimized by a momentum tool. The simulated results show that the receiver front-end provides an NF of 5.48 dB, a conversion gain of 18.1 dB, and an IIP3 around -8.5 dBm at 28 GHz. The circuit dissipates 17.3 mW under a 1.8 V supply.
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