Flexible hardware model: a hardware model or IP reuse and its database management system FHM-DBMS

摘要

This report introduces the Flexible Hardware Model for IP reuse design methodology in VLSI design. In conventional IP reuse design, IP's are often used with slight modifications in order to be introduced in the target system and becomes difficult to be reused. However, if a well considered component model for IP reuse is available, IP reuse design becomes more efficient. Flexible Hardware Model is proposed for targeting such a component model for IP reuse. This article introduces the concept of Flexible Hardware Model and its prototype database management system for FHM, first. Then, an example of FHM-DBMS usage is reported which is a resource database in ASIP Meister. ASIP Meister is an application specific instruction set processor design environment.