An 8-bit Folding A/D Converter with a New Interpolation Technique

摘要

This paper proposes a new interpolation technique for application in a folding A/D converter with interpolation. However, there is not a specific interpolation circuit because this interpolation technique is applied to the folding encoder circuit and to the master latches of the A/D converter. This interpolation technique adds some transistors in the folding encoder circuit, and it adds only three transistors to some master latches. An 8-bit A/D converter has been designed and implemented in a 0.8 μm BiCMOS process, at F{sub}T of 12 GHz to evaluate the proposed interpolation technique.