Reduced-memory direct digital frequency synthesizer using parabolic initial guess

摘要

Based on the parabolic approximation, which was recently introduced by the authors, a new architecture for sine-output direct digital frequency synthesizers has been developed. Due to using this approximation, and also considering several memory-reduction techniques, the proposed architecture is so designed that needs only 725 bits read-only memory for mapping a 12-bit phase address to 10-bit sine amplitude. The synthesizer has also been implemented and the experimental results show its desired operation and performance.