FPGA-based DSP implementation of simple MRC digital beamforming antenna

摘要

This Paper describes the simple MRC (Maximal Ratio Combiner) beam-forming antenna implemented with FPGA (Field Programmable Gate Array) for real-time signal processing and verifies its practical realization in the next generation mobile communications. FPGA is a kind of configurable CPLD (Complex Programmable Logic Device). It combines versatility of a programmable solution such as general DSP (Digital Signal Processor) with performance of dedicated hardware such as ASIC (Application Specific Integrated Circuit). It is expected that FPGA will play an important part in the various applications requiring high speed real-time processing such as DBF (Digital Beamforming) in the future. This paper describes its FPGA-based DSP implementation in detail and introduces experimental results in a radio anechoic chamber.