Design of driver circuit for GHz clock distribution using transmission line interconnect in Si ULSI

摘要

This paper presents the circuit configuration and analysis of GHz clock distribution using the transmission line. First, we report the operation of the differential CMOS driver Circuit with source follower and the decrease of power dissipation for H-tree GHz clock distribution with the source follower using SPICE simulation. Next, power-time product are introduced to evaluating the Circuit operation.