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首页> 外文期刊>Russian Microelectronics >Synthesis of Energy-Efficient Flip-Flop Circuits Based on Sequential-Parallel Structures of MOS Transistors
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Synthesis of Energy-Efficient Flip-Flop Circuits Based on Sequential-Parallel Structures of MOS Transistors

机译:基于MOS晶体管顺序平行结构的节能触发器电路的合成

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摘要

The synthesis of energy-efficient electronic flip-flop circuits based on the application of arrays of p - and n -channel MOS transistors located in the upper and lower half-planes of the circuit is considered. A method is proposed for synthesizing D, RS, and JK flip-flop circuits using a truth table, direct and inverted minterm maps, and expressions describing the transistor arrays. Variants of circuits with and without an output inverter are considered. It is shown that the synthesized circuits have better characteristics and are more efficient than logic element circuits by factors of 2 to 4.
机译:考虑了基于位于电路的上部和下半平面的P - 和N-Channel MOS晶体管阵列的基于应用的节能电子触发器电路的合成。 提出了一种方法,用于使用真理表,直接和反转的Minterm映射和描述晶体管阵列的表达式来合成D,RS和JK触发器电路。 考虑了具有和不带输出逆变器的电路变型。 结果表明,合成电路具有更好的特性,并且通过2至4的因素比逻辑元件电路更有效。

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