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Two novel architectures for 4-channel mixing/filtering/processing digitizers

机译:用于4通道混合/过滤/加工数字化器的两种新颖的架构

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摘要

Two architectures of 4-channel mixing-filtering-processing (MFP) digitizers are presented and compared. Both architectures use four analogue-to-digital converters (ADCs), but differ in terms of layout, and are named parallel and hierarchical, respectively. The hierarchical architecture is entirely novel, while the parallel one is at present only envisaged in patent documents. For both architectures, a suitable analytical model, used to determine the effects of several error sources, is provided. Also, digital signal processing techniques, which combine the digitized streams produced by the four ADCs to compensate the errors, are illustrated for both architectures. The computational cost of these techniques, implemented by means of poly-phase filters, is discussed, and their capability of attaining real time performance highlighted. The results of behavioral simulations carried out to assess the performance of the two 4-channel MFP architectures are finally shown. (C) 2019 Elsevier Ltd. All rights reserved.
机译:呈现并比较了4通道混合滤波处理(MFP)数字化器的两种架构。这两个架构都使用四个模拟 - 数字转换器(ADC),但在布局方面不同,分别命名并行并行和分层。分层体系结构完全是新颖的,而平行于专利文献中仅设想。对于两个架构,提供了一种用于确定若干误差源的效果的合适的分析模型。此外,对于两个架构,示出了组合由四个ADC产生的数字化流以补偿错误的数字信号处理技术。讨论了通过多相滤波器实现的这些技术的计算成本,并且它们能够突出显示实时性能的能力。最终显示了用于评估两个4通道MFP架构的性能的行为模拟结果。 (c)2019年elestvier有限公司保留所有权利。

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