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首页> 外文期刊>電子情報通信学会技術研究報告. VLSI設計技術. VLSI Design Technologies >Low power consumption CMOS digital matched filter - an application example of the Plastic Hard Macro technology
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Low power consumption CMOS digital matched filter - an application example of the Plastic Hard Macro technology

机译:低功耗CMOS数字匹配滤波器-Plastic Hard Macro技术的应用示例

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摘要

A low power consumption Digital Matched Filter (DMF) was designed in 1.8V operation 0.18μm CMOS technology. An 8-bit input 256-tap DMF showed 0.38mW/MHz low power characteristics, that just fitted a portable phone use. Special features are the PN code shifting architecture, an application of the Plastic Hard Macro IP, that is low energy-delay products arithmetic IPs, and clock handling optimizations. The maximum operation frequency was just below 200MHz. A high layout density, 71k gates/mm{sup}2 was also attained.
机译:低功耗数字匹配滤波器(DMF)是在1.8V工作电压下采用0.18μmCMOS技术设计的。 8位输入256抽头DMF具有0.38mW / MHz的低功耗特性,正好适合便携式电话使用。特殊功能包括PN码移位架构,Plastic Hard Macro IP(低能耗产品算术IP)的应用以及时钟处理优化。最大工作频率刚好低于200MHz。还获得了71k gates / mm {sup} 2的高布局密度。

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