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首页> 外文期刊>電子情報通信学会技術研究報告. 集積回路. Integrated Circuits and Devices >A 0.8-1.3V 16-channel 2.5Gbps High-speed Serial Transceiver in a 90nm Standard CMOS Process
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A 0.8-1.3V 16-channel 2.5Gbps High-speed Serial Transceiver in a 90nm Standard CMOS Process

机译:90nm标准CMOS工艺中的0.8-1.3V 16通道2.5Gbps高速串行收发器

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摘要

We describe a 16-channel 2.5Gbps transceiver that operates off a single supply voltage ranging from 0.8V to 1.3 V. We fabricated the transceiver in a 90nm standard CMOS, using CMOS full-swing circuits except for a limited number of speed- and timing-critical circuits that were implemented in reduced-swing circuit topologies. The reduced-swing circuits were the last-stage 2:1 selector of the multiplexer, transmitter output driver, the decision latches, phase interpolators and delay cells in the VCOs. At a supply voltage of 0.8V, the power consumption of 16-channel transceiver is 362mW, i.e., 23mW per transceiver channel.
机译:我们描述了一个16通道2.5Gbps收发器,该收发器在0.8V至1.3V的单电源电压下工作。我们使用CMOS全摆幅电路在90nm标准CMOS中制造了收发器,但速度和时序的数量有限。 -在减小摆幅的电路拓扑中实现的关键电路。减少摆幅的电路是VCO中多路复用器的最后一级2:1选择器,发送器输出驱动器,判决锁存器,相位内插器和延迟单元。在0.8V的电源电压下,16通道收发器的功耗为362mW,即每个收发器通道23mW。

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