One-chip receiver IC for 622Mb/s optical communication systems

摘要

An optical receiver IC for 622Mb/s which integrates a trans-impedance amplifier, a post amplifier and a clock recovery is developed using BiCMOS process. The one-chip receiver achieves a wide dynamic range sensitivity from -29.4 to 0 dBm with a isolation technique. A novel phase-locked loop (PLL) circuit without reference-clock has a high tolerance for input with duty cycle distortion from 70 to 130 %. The characteristics conform to ITU standard.