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Chip-based joint processing adaptive array and equalizer for DS-CDMA packet mobile communication systems

机译:DS-CDMA分组移动通信系统中基于芯片的联合处理自适应阵列和均衡器

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摘要

This report proposes a chip-based joint processing adaptive array and equalizer for DS-CDMA packet mobile communications. The proposed receiver consists of an adaptive array antenna and an MLSE equalizer. The adaptive array part has fractional tap-spacing transversal filters at all the elements, and suppresses co-channel interferences from other cells and ISI (Inter-Symbol Interference) due to delayed paths with relatively large delay time. The MLSE equalizer part, which employs DDFSE (Delayed Decision-Feedback Sequence Estimation) so as to reduce the computational complexity, estimates the chip-level transmitted signals by removing ISI components from the array output. The equalizer output is despread by matched filters, of which the outputs are utilized for the signal detection. In case of the QPSK modulation, computer simulations under frequency selective fading conditions demonstrate that the proposed scheme is superior to the conventional linear chip-based equalization in both the BER performance and the packet throughput.
机译:该报告提出了一种用于DS-CDMA分组移动通信的基于芯片的联合处理自适应阵列和均衡器。拟议的接收机包括一个自适应阵列天线和一个MLSE均衡器。自适应阵列部分在所有元素上都具有分数抽头间距横向滤波器,并抑制了由于延迟路径具有相对较大的延迟时间而导致的来自其他小区的同信道干扰和ISI(符号间干扰)。 MLSE均衡器部分采用DDFSE(延迟决策反馈序列估计)以降低计算复杂度,它通过从阵列输出中去除ISI分量来估计码片级传输信号。均衡器输出由匹配滤波器解扩,其中的输出用于信号检测。在QPSK调制的情况下,在频率选择性衰落条件下的计算机仿真表明,该方案在BER性能和数据包吞吐量方面均优于传统的基于线性芯片的均衡。

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