A Power Reduction Technique for an Equalization Circuit Using Adaptive Bitwidth Control

摘要

In this paper, we propose a new technique for a low power equalization circuit using adaptive bitwidth control. It can reduce the amount of necessary calculation to control the bitwidth of the equalization circuit. In the compensation step, estimation in equalizing will be held in the less bitwidth when the error signals are big. On the other hand, detailed calculation will be held in the more bitwidth when error signals are small. We show that our new technique is effective for a low power equalization circuit by experimental simulation while keeping the required calculation accuracy.