Implementation of a TDM System Using TTL ICs and Microprocessor

摘要

The primary objective of the work is to design a four channel Time Division Multiplexing (TDM) system using TTL ICs and Intel 8085 microprocessor. The design is related to the fabrication of a 4 × 4 shift register block that feeds data to the channel connecting the receiver. The next block is the 4-to-1 line multiplexer which along with the shift register array completes the transmitter section. Again in the receiving block, the reverse process is done in order to recover the data and direct them to the corresponding destinations. The critical portion of the design of this TDM set up is the clocking and synchronization circuits required at different blocks. We have used Intel 8085 microprocessor to synchronize, control and facilitate the data flow through the set-up.