Package-friendly piezoresistive pressure sensors with on-chip integrated packaging-stress-suppressed suspension (PS~3) technology

摘要

An on-chip integrated packaging-stress-suppressed suspension (PS~3) technology for a packaging-stress-free pressure sensor is proposed and developed. With a MIS (microholes interetch and sealing) micromachining process implemented only from the front-side of a single-side polished (111) silicon wafer, a compact cantilever-shaped PS~3 is on-chip integrated surrounding a piezoresistive pressure-sensing structure to provide a packaging-process/substrate-friendly method for low-cost but high-performance sensor applications. With the MIS process, the chip size of the PS~3-enclosed pressure sensor is as small as 0.8 mm × 0.8 mm. Compared with a normal pressure sensor without PS~3 (but with an identical pressure-sensing structure), the proposed pressure sensor has the same sensitivity of 0.046 mV kPa~(-1) (3.3 V)~(-1). However, without using the thermal compensation technique, a temperature coefficient of offset of only 0.016% ℃~(-1) FS is noted for the sensor with PS~3, which is about 15 times better than that for the sensor without PS~3. Featuring effective isolation and elimination of the influence from packaging stress, the PS~3 technique is promising to be widely used for packaging-friendly mechanical sensors.