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Electrical Performances and Structural Designs of Copper Bonding in Wafer-Level Three-Dimensional Integration

机译:晶圆级三维集成中铜键合的电气性能和结构设计

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摘要

The integrity of bonded Cu interconnects in wafer-level three-dimensional integration has been investigated as the function of pattern size and density, as well as bonding process parameter. The desired pattern density coupled with the application of bonding process profile we developed gives optimal yield and alignment accuracy, and provides excellent electrical connectivity and contact resistance through the entire wafer. This result is a key milestone in establishing the manufacturability of Cu-based interconnections for 3D integration technology.
机译:已经研究了晶圆级三维集成中键合铜互连的完整性,它是图形尺寸和密度以及键合工艺参数的函数。所需的图案密度以及我们开发的键合工艺轮廓的应用可提供最佳的良率和对准精度,并在整个晶圆上提供出色的电连接性和接触电阻。这一结果是建立用于3D集成技术的基于铜的互连的可制造性的关键里程碑。

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