Analysis of a Physical Layer Wireless Communication System Implementation on an SDR Baseband Processor

摘要

In this paper, implementation and analysis of an entire wireless communication system physical layer receiver in software is presented. The two paramount issues, namely real-time performance of the executable, as compared to hardware implementation performance, and the power consumption projections for the DSP executing the receiver code are presented. Issues investigated include the paradigm-shift from hardware centric algorithm realizations to a software centric methodology, fixed point DSP algorithm implementation in ANSI C, synchronization of receive and transmit events such as TDMA operations, and processing chain partitioning in a software defined radio baseband processing environment. Results presented will include the MIPS requirements of the processing chain, as well as code and data partitioning trade-offs.