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International Journal of Circuits and Architecture Design

中文名称：国际电路与建筑设计杂志

ISSN：2051-7025
出版周期：Quarterly

发文量：42

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1.Automated physical verification of I/O pads using scaling factors

机译：使用比例因子对I / O焊盘进行自动物理验证
- 作者：Rajesh Mangalore Anand;Soujanya Ravula;Kalpashree Anand
- 期刊名称：《International Journal of Circuits and Architecture Design》 | 2016年第1期
- I/O pad ring;
- physical verification;
- degree of optimisation;
- scaling factors;
2.CMOS oscillator with MOS varactor and body bias tuning

机译：具有MOS变容二极管和主体偏置调谐的CMOS振荡器
- 作者：Manoj Kumar
- 期刊名称：《International Journal of Circuits and Architecture Design》 | 2016年第1期
- CMOS;
- delay cell;
- low power;
- MOS variable load;
3.Approach to design a high performance fault-tolerant reversible ALU

机译：设计高性能容错可逆ALU的方法
- 作者：Neeraj Kumar Misra;Subodh Wairya;Vinod Kumar Singh
- 期刊名称：《International Journal of Circuits and Architecture Design》 | 2016年第1期
4.Curvature-correction in the bandgap voltage reference based on thermal compensation of beta and base-emitter voltage

机译：基于β和基发射极电压的热补偿的带隙电压基准中的曲率校正
- 作者：Vinayak Hande;Maryam Shojaei Baghini
- 期刊名称：《International Journal of Circuits and Architecture Design》 | 2016年第1期
- bandgap voltage reference;
- curvature compensation;
- temperature coefficient;
5.Power-area trade-off in power gated FSM synthesis

机译：功率门控FSM合成中的功率区折衷
- 作者：Priyanka Choudhury;Sambhu Nath Pradhan
- 期刊名称：《International Journal of Circuits and Architecture Design》 | 2016年第1期
- partitioning;
- state encoding;
- finite state machine;
- power gating;
- power-area trade-off;
6.Dynamically reconfigurable evolutionary multi-context robust cellular array design

机译：动态可重构的进化多上下文鲁棒蜂窝阵列设计
- 作者：Sobhan Soleymani;Afzel Noore
- 期刊名称：《International Journal of Circuits and Architecture Design》 | 2016年第1期
7.Design of new NAND/NOR gates in QCA using single electron cells

机译：使用单电子单元设计QCA中的新NAND / NOR门
- 作者：Zeynab Namakizadeh Esfahani;Mahya Sam;Keivan Navi
- 期刊名称：《International Journal of Circuits and Architecture Design》 | 2016年第2期
- quantum dot cellular automata;
- QCA;
- single electron cell;
- three-input NAND/NOR;
- two-dimensional gate;
8.0.5 V, 5 MHz active-RC biquad filter in 90 nm CMOS technology

机译：采用90 nm CMOS技术的0.5 V，5 MHz有源RC双二阶滤波器
- 作者：S. Rekha;T. Laxminidhi
- 期刊名称：《International Journal of Circuits and Architecture Design》 | 2016年第2期
- CMOS;
- inverter;
- transconductor;
- operational transconductance amplifier;
- OTA;
- feed-forward compensation;
- active-RC;
- biquad filter;
- dynamic range;
- figure of merit;
- FOM;
9.GF(2~m) versatile multiplier/adder architecture for cryptographic applications

机译：GF（2〜m）通用乘法器/加法器体系结构，用于密码应用
- 作者：Haichour Amina Selma;Hamadouche Mhamed
- 期刊名称：《International Journal of Circuits and Architecture Design》 | 2016年第2期
- elliptic curve cryptography;
- finite fields;
- GF(2~m) arithmetic;
- MSB-first multiplication;
- polynomial basis;
- versatile architecture;
10.Effectiveness of body bias and hybrid logic: an energy efficient approach to design adders in sub-threshold regime

机译：身体偏见和混合逻辑的有效性：亚阈值范围内设计加法器的节能方法
- 作者：Priya Gupta;Ishan Munje;Anu Gupta;Abhijit Asati
- 期刊名称：《International Journal of Circuits and Architecture Design》 | 2016年第2期
- conventional CMOS;
- C-CMOS;
- transmission gate;
- TO;
- pass gate;
- PG;
- carry look-ahead adder;
- CLA;
- reverse body biasing;
- multiplier accumulator unit;
- MAC;
- power delay product;
- PDP;
- pass transistor;
- sub-threshold regime;
11.Low-power smart passive REU for industrial IoT applications

机译：适用于工业物联网应用的低功耗智能无源REU
- 作者：Vyasa Sai;Marlin H. Mickle
- 期刊名称：《International Journal of Circuits and Architecture Design》 | 2016年第2期
- asynchronous;
- low power;
- internet of things;
- IoT;
- passive;
- radio frequency identification;
- RFID;
- remote execution unit;
- REU;
12.Design of PVT compensated current starved ring oscillator

机译：PVT补偿电流不足环形振荡器的设计
- 作者：D. Anitha;K. Manjunatha Chari;P. Satish Kumar
- 期刊名称：《International Journal of Circuits and Architecture Design》 | 2016年第2期
- PVT variations;
- ring oscillator;
- current starved;
- addition-based current source;
13.Real-time implementation of various colour space models

机译：实时实现各种色彩空间模型
- 作者：Saravanan Govindasamy;Yamuna Govindarajan
- 期刊名称：《International Journal of Circuits and Architecture Design》 | 2016年第4期
- colour space conversions;
- CSC;
- XSG;
- FPGA;
- Simulink;
- co-simulation;
- real-time image processing;
14.Adder circuit design using quantum-dot cellular automata

机译：使用量子点元胞自动机的加法器电路设计
- 作者：Sahar Ghanbary;Mehrdad Maeen;Majid Haghparast
- 期刊名称：《International Journal of Circuits and Architecture Design》 | 2016年第4期
- quantum cellular automata;
- quantum points;
- full-adder design;
- QCA;
15.An efficient realisation of FIFO buffers for NoC routers using technology dependent optimisations targeting LUT based FPGAs

机译：使用针对技术的基于LUT的FPGA的优化，为NoC路由器高效实现FIFO缓冲区
- 作者：Liyaqat Nazir;Roohie Naaz Mir
- 期刊名称：《International Journal of Circuits and Architecture Design》 | 2016年第4期
- depth;
- FIFO;
- network-on-chip;
- NoC;
- flits;
- traffic;
16.Performance improvement in tree multiplier using full swing GDI logic based CLA adder

机译：使用基于全速GDI逻辑的CLA加法器提高树乘法器的性能
- 作者：Shoba Mohan;Nakkeeran Rangaswamy
- 期刊名称：《International Journal of Circuits and Architecture Design》 | 2016年第4期
- GDI logic;
- CLA adder;
- tree multiplier;
- power;
- digital circuit;
17.Design of low power VCO based on single ended delay cells

机译：基于单端延迟单元的低功耗VCO设计
- 作者：Dileep Dwivedi;Manoj Kumar
- 期刊名称：《International Journal of Circuits and Architecture Design》 | 2016年第4期
- CMOS;
- inverter;
- low power;
- phase noise;
- power consumption;
- voltage controlled oscillator;
- VCO;
18.A methodology for automated analysis of SPICE simulation data

机译：自动分析SPICE仿真数据的方法
- 作者：Manoj Sharma;Arti Noor
- 期刊名称：《International Journal of Circuits and Architecture Design》 | 2015年第4期
- SPICE simulation;
- automation;
- flow interface;
- circuits;
- CAD;
19.A low-power voltage level converter for energy-efficient nanoelectronic circuits

机译：用于节能纳米电子电路的低功率电压电平转换器
- 作者：Mohammad Hossein Moaiyeri;Behzad Alidoosti;Majid Moghaddam
- 期刊名称：《International Journal of Circuits and Architecture Design》 | 2015年第4期
- nanoelectronics;
- carbon nanotube FET;
- low-power design;
- multi-V_(DD);
- voltage level converter;
20.Design and comparison of single and double edge synchronisation DLLs

机译：单边和双边同步DLL的设计和比较
- 作者：Saman Mohammadi Mohaghegh;Reza Sabbaghi-Nadooshan
- 期刊名称：《International Journal of Circuits and Architecture Design》 | 2015年第4期
- delay-locked loop;
- DLL;
- jitter;
- multistage clock buffer;
- MCB;
- voltage controlled delay line;
21.Increased digitalisation of flash ADC in modern CMOS process: a review

机译：现代CMOS工艺中闪存ADC的数字化增强：回顾
- 作者：Prachi Palsodkar;Pravin Dakhole
- 期刊名称：《International Journal of Circuits and Architecture Design》 | 2015年第4期
- digitalisation;
- comparator;
- threshold;
- quantisation;
- calibration;
- transconductance;
- flash ADC;
- circuits architecture design;
22.FPGA implementation of linear model predictive controller for real-time position control of DC motor

机译：用于直流电动机实时位置控制的线性模型预测控制器的FPGA实现
- 作者：Dayaram Sonawane;Deepak Ingole;Vihangkumar Naik
- 期刊名称：《International Journal of Circuits and Architecture Design》 | 2015年第4期
- FPGA;
- model predictive control;
- MPC;
- QP solver;
- DC motor control;
23.Low-voltage gate and body driven self-biased cascode current mirror with enhanced bandwidth

机译：具有增强带宽的低压栅极和主体驱动的自偏置共源共栅电流镜
- 作者：Vandana Niranjan;Ashwani Kumar;Shail Bala Jain
- 期刊名称：《International Journal of Circuits and Architecture Design》 | 2015年第4期
- body effect;
- body bias;
- gate and body driven;
- bandwidth;
- analogue signal processing;
- low voltage;
- low power;
- current mirror;
- self-biased cascode current mirror;
- SBCM;
24.PGC: a pattern-based graphics controller

机译：PGC：基于模式的图形控制器
- 作者：Tassadaq Hussain;Amna Haider
- 期刊名称：《International Journal of Circuits and Architecture Design》 | 2014年第2期
- field programmable gate array;
- memory controller;
- high performance computing;
25.Design of fractional order integrators and differentiators using novel rational approximations

机译：使用新颖的有理逼近设计分数阶积分器和微分器
- 作者：Richa Yadav;Maneesha Gupta
- 期刊名称：《International Journal of Circuits and Architecture Design》 | 2014年第2期
26.An efficient arbitration technique for system-on-chip communications

机译：片上系统通信的有效仲裁技术
- 作者：Ruchi Gautam;Mohammad Ayoub Khan
- 期刊名称：《International Journal of Circuits and Architecture Design》 | 2014年第2期
- system-on-chip;
- SoC;
- network-on-chip;
- NoC;
- TDMA;
- CDMA;
- dTDMA;
- FPGA;
- arbitration;
- VLSI;
- AMBA;
- RTL;
27.Editorial

机译：社论
- 作者：Mohammad Ayoub Khan
- 期刊名称：《International Journal of Circuits and Architecture Design》 | 2014年第2期
28.A heuristic approach to variable ordering for logic synthesis engine design: algorithmic insight

机译：逻辑综合引擎设计的启发式变量排序方法：算法见解
- 作者：Harsh Arora;Arindam Banerjee;Rahul Rupchand Jidge
- 期刊名称：《International Journal of Circuits and Architecture Design》 | 2014年第2期
- logic minimisation;
- binary decision diagram;
- BDD;
- reduced ordered binary decision diagrams;
- ROBDD;
- variable ordering;
29.Assertion based functional verification analysis of AMBA-AHB using System Verilog

机译：使用系统Verilog的基于断言的AMBA-AHB功能验证分析
- 作者：Kusum Lata;Akshay Mann
- 期刊名称：《International Journal of Circuits and Architecture Design》 | 2014年第2期
- system-on-chip;
- SoC;
- AMBA-AHB;
- System Verilog;
- functional verification;
- assertions;
30.Design of optimal nano-CMOS differential VCO for RF applications

机译：射频应用的最佳纳米CMOS差分VCO设计
- 作者：Prakash Kumar Rout;Debiprasad Pryabrata Acharya;Ganapati Panda
- 期刊名称：《International Journal of Circuits and Architecture Design》 | 2014年第3期
31.Universal platform for functional testing of printed circuit boards

机译：通用平台，用于印刷电路板功能测试
- 作者：Marian Serban;Yuriy Vagapov;Reg Holme
- 期刊名称：《International Journal of Circuits and Architecture Design》 | 2014年第3期
- printed circuit board;
- PCB testing;
- functional testing;
- Lab VIEW;
32.Low power 0.4 V operational common mode feed forward transconductance amplifier

机译：低功耗0.4 V工作共模前馈跨导放大器
- 作者：Pratik Deshmukh;Madan Mali;Vrushali G. Raut
- 期刊名称：《International Journal of Circuits and Architecture Design》 | 2014年第3期
- adaptive bias;
- class AB;
- common mode feed forward;
- CMFF;
- low power;
- low voltage;
- winner-take-all;
- WTA;
- circuit;
33.Editorial

机译：社论
- 作者：Mohammad Ayoub Khan
- 期刊名称：《International Journal of Circuits and Architecture Design》 | 2014年第3期
34.An efficient VLSI design of a new CRT-based reverse converter for the moduli set {2~n, 2~(2n) - 1, 2~(2n+1) -1}

机译：新型基于CRT的逆变换器的有效VLSI设计，用于模数集{2〜n，2〜（2n）-1，2〜（2n + 1）-1}
- 作者：Edem Kwedzo Bankas;Kazeem Alagbe Gbolagade
- 期刊名称：《International Journal of Circuits and Architecture Design》 | 2014年第3期
- residue number system;
- RNS;
- moduli sets;
- reverse converter;
- new Chinese remainder theorem;
- adder-based converter;
35.Design and simulation of a low voltage, low power OTA-based filter for biomedical signal recognition

机译：用于医学信号识别的低电压，低功耗，基于OTA的滤波器的设计和仿真
- 作者：Gaytri Gupta;Sujata Pandey
- 期刊名称：《International Journal of Circuits and Architecture Design》 | 2014年第3期
- operational transconductance amplifier;
- electrocardiography;
- TSMC library;
- Gm-C filter;
- biquad structures;
- biomedical signal;
- architecture of OTA;
36.Low power 8051-MISA-based remote execution unit architecture for IoT and RFID applications

机译：基于低功耗8051-MISA的远程执行单元架构，适用于IoT和RFID应用
- 作者：Vyasa Sai;Marlin H. Mickle
- 期刊名称：《International Journal of Circuits and Architecture Design》 | 2013年第1期
- Iow power;
- passive node;
- remote execution unit;
- REU;
- RFID;
- 8051;
- internet of things;
- IoT;
37.A programmable multi-step cyclic Vernier time-to-digital converter

机译：可编程多步循环游标时间数字转换器
- 作者：Mina Raymond;Maged Ghoneima;Yehea Ismail
- 期刊名称：《International Journal of Circuits and Architecture Design》 | 2013年第1期
- time measurement;
- time-to-digital converters;
- TDC;
- data conversion;
- calibration systems;
38.Adaptive AI-based two-stage control for an induction machine drive

机译：基于自适应AI的感应电机驱动两阶段控制
- 作者：Vikas Kumar;Prerna Gaur;A.P. Mittal
- 期刊名称：《International Journal of Circuits and Architecture Design》 | 2013年第1期
- neuro-fuzzy control;
- current input model;
- two-stage control;
- adaptive control;
39.Editorial

机译：社论
- 作者：Mohammad Ayoub Khan
- 期刊名称：《International Journal of Circuits and Architecture Design》 | 2013年第1期
40.Design techniques for variability mitigation

机译：减轻变异性的设计技术
- 作者：Shady Agwa;Eslam Yahya;Yehea Ismail
- 期刊名称：《International Journal of Circuits and Architecture Design》 | 2013年第1期
41.Elimination of output gating performance overhead for critical paths in scan test

机译：消除了扫描测试中关键路径的输出门控性能开销
- 作者：Ashok Kumar Suhag;Satdev Ahlawat;Vivek Shrivastava;Nidhi Singh
- 期刊名称：《International Journal of Circuits and Architecture Design》 | 2013年第1期
- scan-based testing;
- scan flip-flop;
- low power testing;
- launch on capture;
- launch on shift;
- timing critical path;
42.A comprehensive comparison between LE and LM-based methodologies for optimisation of digital circuits

机译：基于LE和LM的方法论的全面比较，以优化数字电路
- 作者：Kunwar Singh;Satish Chandra Tiwari;Maneesha Gupta
- 期刊名称：《International Journal of Circuits and Architecture Design》 | 2013年第1期
- VLSI;
- digital CMOS circuits;
- logical effort theory;
- Levenberg-Marquardt algorithm;
- power-delay product;
- power-delay-area product;

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