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IFIP TC10 WG10.5 international conference on computer hardware description languages and their applications

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1.Synchronous Languages for Hardware and Software Reactive Systems

机译：硬件和软件无功系统的同步语言
- 作者：Gerard Berry
- 会议名称：《IFIP TC10 WG10.5 international conference on computer hardware description languages and their applications》 | 1997年
- Synchronous languages;
- reactive systems;
2.Hardware Description Languages in Practical Design Flows

机译：实用设计流动中的硬件描述语言
- 作者：Raul Camposano
- 会议名称：《IFIP TC10 WG10.5 international conference on computer hardware description languages and their applications》 | 1997年
3.The World of I/O: A Rich Application Area for Formal Methods

机译：I / O的世界：正式方法的丰富应用领域
- 作者：Francisco Corella
- 会议名称：《IFIP TC10 WG10.5 international conference on computer hardware description languages and their applications》 | 1997年
4.SOFHIA: A CAD Environment to Design Digital Control Systems

机译：Sofhia：设计数字控制系统的CAD环境
- 作者：Ricardo J. Machado;Joao M. Fernandes;Alberto J. Proenca
- 会议名称：《IFIP TC10 WG10.5 international conference on computer hardware description languages and their applications》 | 1997年
- Petri Nets;
- Digital Control Systems;
- VHDL;
- CAD Tools;
5.System-Level Hardware Design with #mu#-Charts

机译：系统级硬件设计与＃mu＃-charts
- 作者：Jan Philipps;Peter Scholz
- 会议名称：《IFIP TC10 WG10.5 international conference on computer hardware description languages and their applications》 | 1997年
- System-Level Specification;
- Design;
- Formal Methods.;
6.tripleS - A Formal Validation Environment for Functional Specifications

机译：三元组 - 功能规范的正式验证环境
- 作者：J-P. Soininen;J. Saarikettu;V. Veijalainen;T. Huttunen
- 会议名称：《IFIP TC10 WG10.5 international conference on computer hardware description languages and their applications》 | 1997年
- Validation;
- State space generation;
- System level specification;
- VHDL;
7.High-Level Synthesis of Structured Data Paths

机译：结构化数据路径的高级合成
- 作者：C. Mandal R. M. Zimmer
- 会议名称：《IFIP TC10 WG10.5 international conference on computer hardware description languages and their applications》 | 1997年
- Scheduling;
- Allocation;
- High-Level Synthesis (HLS);
- Genetic Algorithm (GA).;
8.A New Partial Order Reduction Algorithm for Concurrent System Verification

机译：一种新的局部顺序减少算法，用于并发系统验证
- 作者：Ratan Nalumasu;Ganesh Gopalakrishnan
- 会议名称：《IFIP TC10 WG10.5 international conference on computer hardware description languages and their applications》 | 1997年
- Finite system verification;
- Explicit enumeration;
- Partial order reductions;
9.Exploiting Isomorphism for Speeding-Up Instance-Binding in an Integrated Scheduling, Allocation and Assignment Approach to Architectural Synthesis

机译：利用同构拟合在集成调度，分配和架构合成方法中加速的同构绑定
- 作者：Birger Landwehr;Peter Marwedel;Ingoif Markhof;Rainer Domer
- 会议名称：《IFIP TC10 WG10.5 international conference on computer hardware description languages and their applications》 | 1997年
- IP-based architectural synthesis;
- netlist isomorphism. instance binding;
- normal form;
10.Simplifying Data Operations for Formal Verification

机译：简化数据操作进行正式验证
- 作者：Felice Balarin Khurram Sajid
- 会议名称：《IFIP TC10 WG10.5 international conference on computer hardware description languages and their applications》 | 1997年
- formal verification;
- abstraction;
- reduction;
11.Object Oriented Extensions to VHDL, The LaMI proposal

机译：面向VHDL的对象扩展，LAMI提案
- 作者：Judith BENZAKKI;Bachir DJAFRI
- 会议名称：《IFIP TC10 WG10.5 international conference on computer hardware description languages and their applications》 | 1997年
- VHDL;
- object;
- inheritance;
- encapsulation;
- message-passing;
- polymorphism;
- reusability;
12.Verifying linear temporal properties of data insensitive controllers using finite instantiations

机译：使用有限实例验证数据不敏感控制器的线性时间特性
- 作者：R. Hojati D. L. Dill R. K. Brayton
- 会议名称：《IFIP TC10 WG10.5 international conference on computer hardware description languages and their applications》 | 1997年
- Formal verification;
- Computer-aided design;
- verification.;
13.VHDL generation from SDL specifications

机译：从SDL规范中产生VHDL
- 作者：Jean-Marc Daueau;Gilberto Fernandes Marchioro;Carlos Alberto Valderrama;Ahmed Amine Jerraya
- 会议名称：《IFIP TC10 WG10.5 international conference on computer hardware description languages and their applications》 | 1997年
- Hardware/Software codesign;
- SDL;
- System level specification;
- VHDL generation;
- Communication synthesis;
14.Towards a Complete Design Method for Embedded Systems Using Predicate/Transition-Nets

机译：迈向使用谓词/转换网的嵌入式系统的完整设计方法
- 作者：B. Kleinjohann J. Tacken;C. Tahedl
- 会议名称：《IFIP TC10 WG10.5 international conference on computer hardware description languages and their applications》 | 1997年
- Design Method;
- Embedded Systems Design;
- Hardware/Software-Codesign;
- High Level Petri Nets;
15.Modeular Operational Semantic Specification of Transport Triggered Architectures

机译：运输触发架构的模块化操作语义规范
- 作者：Henk Corporaal;Pieter Hartel;Jon Mountjoy
- 会议名称：《IFIP TC10 WG10.5 international conference on computer hardware description languages and their applications》 | 1997年
- Operational semantics;
- architecture specification;
- model development;
16.Algebra of Communiating Timing Charts for Describing and Verifying Hardware Interfaces

机译：用于详细描述和验证硬件接口的时序图的代数
- 作者：Bachir Berkane;Simona Gandrabur;Eduard Cerny
- 会议名称：《IFIP TC10 WG10.5 international conference on computer hardware description languages and their applications》 | 1997年
- Timing clart algebra;
- formal semantics;
- reactivity;
- equivalence;
17.Verification of Large Systems in Silicon

机译：硅中大型系统的验证
- 作者：Cary Ussery;Simon Curry
- 会议名称：《IFIP TC10 WG10.5 international conference on computer hardware description languages and their applications》 | 1997年
- System-Level Specification;
- System Level Design;
- Verification;
- Validation;
- Hardware Description Languages;
18.The Shall Design Test Development Model for Hardware Systems

机译：硬件系统的设计测试开发模型
- 作者：Mike Heuchling;Wolfgang Ecker;Michael Mrva
- 会议名称：《IFIP TC10 WG10.5 international conference on computer hardware description languages and their applications》 | 1997年
- SDT development model;
- design complexity;
- design method;
- unified method;
- requirements;
- model linking;
- reuse;
- generalization concepts;
- pattern;
19.Characterizing a portable subset of behavioral VHDL-93

机译：表征行为VHDL-93的便携式子集
- 作者：Krishnaprasad Thirunarayan Robert L. Ewing
- 会议名称：《IFIP TC10 WG10.5 international conference on computer hardware description languages and their applications》 | 1997年
- WHDL;
- formal specification;
- simulation;
- shared variables;
20.A formal proof of absence of deadlock for any acyclic network of PCI buses

机译：对于任何无循环网络的PCI总线缺乏僵局的正式证明
- 作者：Francisco Corella Robert Shaw Cui Zhang
- 会议名称：《IFIP TC10 WG10.5 international conference on computer hardware description languages and their applications》 | 1997年
- PCI protocol;
- deadlock freedom;
- formal verification;
21.VHDL Power Simulator: Power Analysis at Gate-Level

机译：VHDL电源模拟器：门级功率分析
- 作者：L. Kruse;D. Rabe;W. Nebel
- 会议名称：《IFIP TC10 WG10.5 international conference on computer hardware description languages and their applications》 | 1997年
- VHDL;
- Power Estimation;
- Timing;
22.Behavioural Modelling of Sampled-Data Systems with HDL-A and ABSynth

机译：HDL-A和Absynth采样数据系统的行为建模
- 作者：Vincent Moser;Hans Peter Amann;Fausto Pellandini
- 会议名称：《IFIP TC10 WG10.5 international conference on computer hardware description languages and their applications》 | 1997年