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Design, Automationj and Test in Europe Conference and Exhibition

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1.Reducing cache access energy in array-intensive applications

机译：减少数组密集型应用中的缓存访问能量
- 作者：Kandemir M.;Kolcu I.;Institute of Electric and Electronic Engineer
- 会议名称：《Design, Automationj and Test in Europe Conference and Exhibition》 | 2002年
2.Transforming arbitrary structures into topologically equivalent slicing structures

机译：将任意结构转化为拓扑等同的切片结构
- 作者：Peyran O.;Wenjun Zhuang;Institute of Electric and Electronic Engineer
- 会议名称：《Design, Automationj and Test in Europe Conference and Exhibition》 | 2002年
3.Composition trees in finding best variable orderings for ROBDDs

机译：在寻找Robdds的最佳变量排序时构成树木
- 作者：Dubrova E.;Institute of Electric and Electronic Engineer
- 会议名称：《Design, Automationj and Test in Europe Conference and Exhibition》 | 2002年
4.A novel methodology for the concurrent test of partial and dynamically reconfigurable SRAM-based FPGAs

机译：一种新的基于SRAM的FPGA的局部和动态可重构的SRAM的并发测试方法
- 作者：Gericota M.G.;Alves G.R.;Silva M.L.;Institute of Electric and Electronic Engineer
- 会议名称：《Design, Automationj and Test in Europe Conference and Exhibition》 | 2002年
5.Efficient and effective redundancy removal for million-gate circuits

机译：有效且有效的冗余拆卸百万栅极电路
- 作者：Berkelaar M.;van Eijk K.;Institute of Electric and Electronic Engineer
- 会议名称：《Design, Automationj and Test in Europe Conference and Exhibition》 | 2002年
6.Optimization techniques for design of general and feedback linear analog amplifiers with symbolic analysis

机译：符号分析的一般反馈线性模拟放大器设计优化技术
- 作者：Hieu T.c.;Institute of Electric and Electronic Engineer
- 会议名称：《Design, Automationj and Test in Europe Conference and Exhibition》 | 2002年
7.Fault detection and diagnosis using wavelet based transient current analysis

机译：基于小波的瞬态电流分析的故障检测与诊断
- 作者：Bhunia S.;Roy K.;Institute of Electric and Electronic Engineer
- 会议名称：《Design, Automationj and Test in Europe Conference and Exhibition》 | 2002年
8.Maximizing conditional reuse by pre-synthesis transformations

机译：通过预合成转换最大化条件重用
- 作者：Penalba O.;Mendias J.M.;Hermida R.;Institute of Electric and Electronic Engineer
- 会议名称：《Design, Automationj and Test in Europe Conference and Exhibition》 | 2002年
9.How to choose semiconductor IP? - embedded processors

机译：如何选择半导体IP？ - 嵌入式处理器
- 作者：Phillips I.;Institute of Electric and Electronic Engineer
- 会议名称：《Design, Automationj and Test in Europe Conference and Exhibition》 | 2002年
10.Visualisation of partial order models in VLSI design flow

机译：VLSI设计流程中部分订单模型的可视化
- 作者：Bystrov A.;Yakovlev A.;Koutny M.;Institute of Electric and Electronic Engineer
- 会议名称：《Design, Automationj and Test in Europe Conference and Exhibition》 | 2002年
11.Automatic topology-based identification of instruction-set extensions for embedded processors

机译：基于自动拓扑的嵌入式处理器的指令集扩展的识别
- 作者：Pozzi L.;Vuletic M.;Ienne P.;Institute of Electric and Electronic Engineer
- 会议名称：《Design, Automationj and Test in Europe Conference and Exhibition》 | 2002年
12.A complete phase-locked loop power consumption model

机译：完整的锁相环功耗模型
- 作者：Duarte D.;Vijaykrishnan N.;Irwin M.J.;Institute of Electric and Electronic Engineer
- 会议名称：《Design, Automationj and Test in Europe Conference and Exhibition》 | 2002年
13.Error simulation based on the systemC design description language

机译：基于SystemC设计描述语言的错误模拟
- 作者：Bruschi F.;Ferrandi F.;Chiamenti M.;Institute of Electric and Electronic Engineer
- 会议名称：《Design, Automationj and Test in Europe Conference and Exhibition》 | 2002年
14.Non-rectangular shaping and sizing of soft modules in floorplan design

机译：平面图设计中软模块的非矩形成型和尺寸
- 作者：Chu C.C.N.;Young E.F.Y.;Institute of Electric and Electronic Engineer
- 会议名称：《Design, Automationj and Test in Europe Conference and Exhibition》 | 2002年
15.An efficient test and diagnosis scheme for the feedback type of analog circuits with minimal added circuits

机译：具有最小添加电路的模拟电路反馈类型的有效测试和诊断方案
- 作者：Jun Weir Lin;Chung Len Lee;Jwu-E Chen;Institute of Electric and Electronic Engineer
- 会议名称：《Design, Automationj and Test in Europe Conference and Exhibition》 | 2002年
16.Comparative analysis and application of data repository infrastructure for collaboration-enabled distributed design environments

机译：数据存储库基础设施对协作的分布式设计环境的比较分析与应用
- 作者：Indrusiak L.S.;Glesner M.;Reis R.;Institute of Electric and Electronic Engineer
- 会议名称：《Design, Automationj and Test in Europe Conference and Exhibition》 | 2002年
17.A heuristic for test scheduling at system level

机译：系统级测试调度的启发式
- 作者：Flottes M.-L.;Pouget J.;Rouzeyre B.;Institute of Electric and Electronic Engineer
- 会议名称：《Design, Automationj and Test in Europe Conference and Exhibition》 | 2002年
18.A SAT solver using software and reconfigurable hardware

机译：使用软件和可重新配置硬件的SAT求解器
- 作者：Skliarova I.;Ferrari A.B.;Institute of Electric and Electronic Engineer
- 会议名称：《Design, Automationj and Test in Europe Conference and Exhibition》 | 2002年
19.On nanoscale integration and gigascale complexity in the post .com world

机译：论南京邮政世界纳米级集成与千兆复杂性
- 作者：De Man H.;Institute of Electric and Electronic Engineer
- 会议名称：《Design, Automationj and Test in Europe Conference and Exhibition》 | 2002年
20.Compact macromodel for lossy coupled transmission lines

机译：紧凑型宏摩托车用于有损耦合传输线
- 作者：Khazaka R.;Nakhla M.;Institute of Electric and Electronic Engineer
- 会议名称：《Design, Automationj and Test in Europe Conference and Exhibition》 | 2002年
21.Fault isolation using tests for non-isolated blocks

机译：使用非隔离块测试的故障隔离
- 作者：Pomeranz I.;Zorian Y.;Institute of Electric and Electronic Engineer
- 会议名称：《Design, Automationj and Test in Europe Conference and Exhibition》 | 2002年
22.Substrate parasitic extraction for RF integrated circuits

机译：RF集成电路的基材寄生萃取
- 作者：Cathelin A.;Leclercq Y.;Saias D.;Institute of Electric and Electronic Engineer
- 会议名称：《Design, Automationj and Test in Europe Conference and Exhibition》 | 2002年
23.On the use of an oscillation-based test methodology for CMOS micro-electro-mechanical systems

机译：关于CMOS微机电系统的基于振荡的测试方法的使用
- 作者：Beroulle V.;Bertrand Y.;Latorre L.;Institute of Electric and Electronic Engineer
- 会议名称：《Design, Automationj and Test in Europe Conference and Exhibition》 | 2002年
24.Flexbench: reuse of verification IP to increase productivity

机译：FlexBench：重用验证IP以提高生产率
- 作者：Stohr B.;Simmons M.;Geishauser J.;Institute of Electric and Electronic Engineer
- 会议名称：《Design, Automationj and Test in Europe Conference and Exhibition》 | 2002年
25.Daisy-CT: a high-level simulation tool for continuous-time /spl Delta//spl Sigma/ modulators

机译：Daisy-CT：用于连续时间/ SPL DELTA // SPL SIGMA /调制器的高级仿真工具
- 作者：Francken K.;Vogels M.;Martens E.;Institute of Electric and Electronic Engineer
- 会议名称：《Design, Automationj and Test in Europe Conference and Exhibition》 | 2002年
26.Estimation of power consumption in encoded data buses

机译：编码数据总线的功耗估计
- 作者：Ortiz A.G.;Kabulepa L.D.;Glesner M.;Institute of Electric and Electronic Engineer
- 会议名称：《Design, Automationj and Test in Europe Conference and Exhibition》 | 2002年
27.A new formulation for SOC floorplan area minimization problem

机译：一种新的SOC Placeplan区域最小化问题的制定
- 作者：Chih-Hung Lee;Yu-Chung Lin;Wen-Yu Fu;Institute of Electric and Electronic Engineer
- 会议名称：《Design, Automationj and Test in Europe Conference and Exhibition》 | 2002年
28.Search-based SAT using zero-suppressed BDDs

机译：以零抑制的BDDS为基础的SAD
- 作者：Aloul F.A.;Mneimneh M.N.;Sakallah K.A.;Institute of Electric and Electronic Engineer
- 会议名称：《Design, Automationj and Test in Europe Conference and Exhibition》 | 2002年
29.Steady state calculation of oscillators using continuation methods

机译：使用延续方法稳态计算振荡器
- 作者：Brachtendorf H.G.;Lampe S.;Laur R.;Institute of Electric and Electronic Engineer
- 会议名称：《Design, Automationj and Test in Europe Conference and Exhibition》 | 2002年
30.Who owns the platform?

机译：谁拥有平台？
- 作者：Wolf W.;Gerousis V.;Levia O.;Institute of Electric and Electronic Engineer
- 会议名称：《Design, Automationj and Test in Europe Conference and Exhibition》 | 2002年
31.A direct mapping system for datapath module and FSM implementation into LUT-based FPGAs

机译：DataPath模块和FSM实现的直接映射系统，进入基于LUT的FPGA
- 作者：Abke J.;Barke E.;Institute of Electric and Electronic Engineer
- 会议名称：《Design, Automationj and Test in Europe Conference and Exhibition》 | 2002年
32.An EMC-compliant design method for high-density integrated circuits

机译：符合EMC的高密度集成电路设计方法
- 作者：Ramdani M.;Levant J.-L.;Institute of Electric and Electronic Engineer
- 会议名称：《Design, Automationj and Test in Europe Conference and Exhibition》 | 2002年
33.Global responsibilities in SoC design

机译：SoC设计的全球责任
- 作者：Scanlon T.;Institute of Electric and Electronic Engineer
- 会议名称：《Design, Automationj and Test in Europe Conference and Exhibition》 | 2002年
34.Finding a common fault response for diagnosis during silicon debug

机译：在Silicon调试期间找到诊断的常见故障响应
- 作者：Pomeranz I.;Rajski J.;Reddy S.M.;Institute of Electric and Electronic Engineer
- 会议名称：《Design, Automationj and Test in Europe Conference and Exhibition》 | 2002年
35.High-level modeling and design of asynchronous arbiters for on-chip communication systems

机译：用于片上通信系统的异步仲裁者的高级建模与设计
- 作者：Rigaud J.-B.;Quartana J.;Fesquett L.;Institute of Electric and Electronic Engineer
- 会议名称：《Design, Automationj and Test in Europe Conference and Exhibition》 | 2002年
36.Make your SOC design a winner: select the right memory IP

机译：使您的SOC设计成为一个获胜者：选择合适的内存IP
- 作者：Ratford V.;Institute of Electric and Electronic Engineer
- 会议名称：《Design, Automationj and Test in Europe Conference and Exhibition》 | 2002年
37.A new time model for the specification, design, validation and synthesis of embedded real-time systems

机译：嵌入式实时系统的规范，设计，验证和合成的新时间模型
- 作者：Munzenberger R.;Dorfel M.;Slomka F.;Institute of Electric and Electronic Engineer
- 会议名称：《Design, Automationj and Test in Europe Conference and Exhibition》 | 2002年
38.On-chip inductance models: 3D or not 3D?

机译：片上电感模型：3D或不是3D？
- 作者：Tao Lin;Beattie M.W.;Pileggi L.T.;Institute of Electric and Electronic Engineer
- 会议名称：《Design, Automationj and Test in Europe Conference and Exhibition》 | 2002年
39.An evolutionary approach to the design of on-chip pseudorandom test pattern generators

机译：芯片上伪随机测试图案发生器设计的进化方法
- 作者：Favalli M.;Dalpasso M.;Institute of Electric and Electronic Engineer
- 会议名称：《Design, Automationj and Test in Europe Conference and Exhibition》 | 2002年
40.An encoding technique for low power CMOS implementations of controllers

机译：控制器低功率CMOS实现的编码技术
- 作者：Martinez M.;Avedillo M.J.;Quintana J.M.;Institute of Electric and Electronic Engineer
- 会议名称：《Design, Automationj and Test in Europe Conference and Exhibition》 | 2002年
41.The selective pull-up (SP) noise immunity scheme for dynamic circuits

机译：动态电路的选择性上拉（SP）噪声免疫方案
- 作者：Stan M.R.;Panigrahi A.;Institute of Electric and Electronic Engineer
- 会议名称：《Design, Automationj and Test in Europe Conference and Exhibition》 | 2002年
42.Towards a kernel language for heterogenous computing

机译：朝着异构计算的内核语言
- 作者：Bjorklund D.;Lilius J.;Institute of Electric and Electronic Engineer
- 会议名称：《Design, Automationj and Test in Europe Conference and Exhibition》 | 2002年
43.Improved constraints for multiprocessor system scheduling

机译：改进多处理器系统调度的约束
- 作者：Grajcar M.;Grass W.;Institute of Electric and Electronic Engineer
- 会议名称：《Design, Automationj and Test in Europe Conference and Exhibition》 | 2002年
44.Formal verification techniques: industrial status and perspectives

机译：正式验证技术：工业状况和观点
- 作者：Moussa I.;Pacalet R.;Blasquez J.;Institute of Electric and Electronic Engineer
- 会议名称：《Design, Automationj and Test in Europe Conference and Exhibition》 | 2002年
45.Control circuit templates for asynchronous bundled-data pipelines

机译：用于异步捆绑数据管道的控制电路模板
- 作者：Tugsinavisut S.;Beerel P.A.;Institute of Electric and Electronic Engineer
- 会议名称：《Design, Automationj and Test in Europe Conference and Exhibition》 | 2002年
46.European CAD from the 60's to the new millenium

机译：从60年代到新千年的欧洲CAD
- 作者：Borel J.;Institute of Electric and Electronic Engineer
- 会议名称：《Design, Automationj and Test in Europe Conference and Exhibition》 | 2002年
47.Simple and efficient approach for shunt admittance parameters calculations of VLSI on-chip interconnects on semiconducting substrate

机译：半导体衬底上VLSI片上互连的分流进料参数计算简单有效的方法
- 作者：Ymeri H.;Nauwelaers B.;Maex K.;Institute of Electric and Electronic Engineer
- 会议名称：《Design, Automationj and Test in Europe Conference and Exhibition》 | 2002年
48.Efficient on-line testing method for a floating-point iterative array divider

机译：浮点迭代阵列分频器的高效在线测试方法
- 作者：Drozd A.;Lobachev M.;Drozd Ju.;Institute of Electric and Electronic Engineer
- 会议名称：《Design, Automationj and Test in Europe Conference and Exhibition》 | 2002年
49.An instruction-level methodology for power estimation and optimization of embedded VLIW cores

机译：嵌入式VLIW核心功率估计和优化的指令级方法
- 作者：Bona A.;Sami M.;Sciuto D.;Institute of Electric and Electronic Engineer
- 会议名称：《Design, Automationj and Test in Europe Conference and Exhibition》 | 2002年
50.Directed-binary search in logic BIST diagnostics

机译：逻辑BIST诊断中的指示 - 二进制搜索
- 作者：Kapur R.;Williams T.W.;Mercer M.R.;Institute of Electric and Electronic Engineer
- 会议名称：《Design, Automationj and Test in Europe Conference and Exhibition》 | 2002年
51.IP is all about implementation and customer satisfaction

机译：IP是关于实施和客户满意度的全部
- 作者：Essi V.P.;Institute of Electric and Electronic Engineer
- 会议名称：《Design, Automationj and Test in Europe Conference and Exhibition》 | 2002年
52.Top-down system level design methodology using specC, VCC and systemC

机译：使用Specc，VCC和SystemC的自上而下系统级设计方法
- 作者：Lukai Cai;Kritzinger P.;Olivares M.;Institute of Electric and Electronic Engineer
- 会议名称：《Design, Automationj and Test in Europe Conference and Exhibition》 | 2002年
53.Hierarchical simulation of substrate coupling in mixed-signal ICs considering the power supply network

机译：考虑电源网络混合信号IC中基板耦合的分层模拟
- 作者：Brandtner T.;Weigel R.;Institute of Electric and Electronic Engineer
- 会议名称：《Design, Automationj and Test in Europe Conference and Exhibition》 | 2002年
54.Analog IP testing:diagnosis and optimization

机译：模拟IP测试：诊断和优化
- 作者：Guardiani C.;McNamara P.;Daldoss L.;Institute of Electric and Electronic Engineer
- 会议名称：《Design, Automationj and Test in Europe Conference and Exhibition》 | 2002年
55.Analog circuit sizing using adaptive worst-case parameter sets

机译：模拟电路尺寸使用自适应最坏情况参数集
- 作者：Schwencker R.;Schenkel F.;Pronath M.;Institute of Electric and Electronic Engineer
- 会议名称：《Design, Automationj and Test in Europe Conference and Exhibition》 | 2002年
56.Layout driven decomposition with congestion consideration

机译：布局驱动驱动与拥塞考虑因素
- 作者：Kutzschebauch T.;Stok L.;Institute of Electric and Electronic Engineer
- 会议名称：《Design, Automationj and Test in Europe Conference and Exhibition》 | 2002年
57.FACTOR: a hierarchical methodology for functional test generation and testability analysis

机译：因子：功能试验生成和可测试性分析的分层方法
- 作者：Vedula V.M.;Abraham J.A.;Institute of Electric and Electronic Engineer
- 会议名称：《Design, Automationj and Test in Europe Conference and Exhibition》 | 2002年
58.A hierarchical test scheme for system-on-chip designs

机译：用于片上系统设计的分层测试方案
- 作者：Jin-Fu Li;Hsin-Jung Huang;Jeng-Bin Chen;Institute of Electric and Electronic Engineer
- 会议名称：《Design, Automationj and Test in Europe Conference and Exhibition》 | 2002年
59.Analysis of nonlinearities in RF front-end architectures using a modified volterra series approach

机译：使用改进的Volterra系列方法分析RF前端架构中的非线性
- 作者：Goffioul M.;Wambacq P.;Vandersteen G.;Institute of Electric and Electronic Engineer
- 会议名称：《Design, Automationj and Test in Europe Conference and Exhibition》 | 2002年
60.Exploiting idle cycles for algorithm level re-computing

机译：利用算法级重新计算的空闲周期
- 作者：Kaijie Wu;Karri R.;Institute of Electric and Electronic Engineer
- 会议名称：《Design, Automationj and Test in Europe Conference and Exhibition》 | 2002年
61.Automatic modifications of high level VHDL descriptions for fault detection or tolerance

机译：用于故障检测或容差的高级VHDL描述的自动修改
- 作者：Leveugle R.;Institute of Electric and Electronic Engineer
- 会议名称：《Design, Automationj and Test in Europe Conference and Exhibition》 | 2002年
62.Beyond UML to an end-of-line functional test engine

机译：超越UML到线端功能测试引擎
- 作者：Baldini A.;Benso A.;Prinetto P.;Institute of Electric and Electronic Engineer
- 会议名称：《Design, Automationj and Test in Europe Conference and Exhibition》 | 2002年
63.Model reduction in the time-domain using laguerre polynomials and krylov methods

机译：使用Laguerre多项式和Krylov方法的时域模型减少
- 作者：Chen Y.;Balakrishnan V.;Koh C.-K.;Institute of Electric and Electronic Engineer
- 会议名称：《Design, Automationj and Test in Europe Conference and Exhibition》 | 2002年
64.Embedded system design based on webservices

机译：基于WebServices的嵌入式系统设计
- 作者：Rettberg A.;Thronicke W.;Institute of Electric and Electronic Engineer
- 会议名称：《Design, Automationj and Test in Europe Conference and Exhibition》 | 2002年
65.Global optimization applied to the oscillator problem

机译：全局优化应用于振荡器问题
- 作者：Lampe S.;Laur R.;Institute of Electric and Electronic Engineer
- 会议名称：《Design, Automationj and Test in Europe Conference and Exhibition》 | 2002年
66.Minimal test for coupling faults in word-oriented memories

机译：以字导向的存储器耦合故障的最小测试
- 作者：van de Goor A.J.;Abadir M.S.;Carlin A.;Institute of Electric and Electronic Engineer
- 会议名称：《Design, Automationj and Test in Europe Conference and Exhibition》 | 2002年
67.Modeling techniques and tests for partial faults in memory devices

机译：内存设备中部分故障的建模技术和测试
- 作者：Al-Ars Z.;van de Goor A.J.;Institute of Electric and Electronic Engineer
- 会议名称：《Design, Automationj and Test in Europe Conference and Exhibition》 | 2002年
68.Exact grading of multiple path delay faults

机译：多路径延迟故障的精确分级
- 作者：Padmanaban S.;Tragoudas S.;Institute of Electric and Electronic Engineer
- 会议名称：《Design, Automationj and Test in Europe Conference and Exhibition》 | 2002年
69.An interval-based diagnosis scheme for identifying failing vectors in a scan-BIST environment

机译：一种基于间隔的诊断方案，用于识别扫描BIST环境中的失败向量
- 作者：Chunsheng Liu;Chakrabarty K.;Goessel M.;Institute of Electric and Electronic Engineer
- 会议名称：《Design, Automationj and Test in Europe Conference and Exhibition》 | 2002年
70.Dynamic V/sub TH/ scaling scheme for active leakage power reduction

机译：动态V / SUB / SCASING方案，用于有源漏功率降低
- 作者：Kim C.H.;Roy K.;Institute of Electric and Electronic Engineer
- 会议名称：《Design, Automationj and Test in Europe Conference and Exhibition》 | 2002年
71.Self-checking scheme for the on-line testing of power supply noise

机译：用于电源噪声的在线测试的自检方案
- 作者：Metra C.;Schiano L.;Favalli M.;Institute of Electric and Electronic Engineer
- 会议名称：《Design, Automationj and Test in Europe Conference and Exhibition》 | 2002年
72.Wire placement for crosstalk energy minimization in address buses

机译：地址总线中串扰能量最小化的电线放置
- 作者：Macchiarulo L.;Macii E.;Poncino M.;Institute of Electric and Electronic Engineer
- 会议名称：《Design, Automationj and Test in Europe Conference and Exhibition》 | 2002年
73.A two-tier distributed electronic design framework

机译：双层分布式电子设计框架
- 作者：Kazmierski T.;Clayton N.;Institute of Electric and Electronic Engineer
- 会议名称：《Design, Automationj and Test in Europe Conference and Exhibition》 | 2002年
74.A powerful system design methodology combining OCAPI and handel-C for concept engineering

机译：强大的系统设计方法，结合了OCAPI和Handel-C对概念工程
- 作者：Buchenrieder K.;Pyttel A.;Sedlmeier A.;Institute of Electric and Electronic Engineer
- 会议名称：《Design, Automationj and Test in Europe Conference and Exhibition》 | 2002年
75.Automatic generation of common-centroid capacitor arrays with arbitrary capacitor ratio

机译：自动生成具有任意电容器比的常见质心电容器阵列
- 作者：Sayed D.;Dessouky M.;Institute of Electric and Electronic Engineer
- 会议名称：《Design, Automationj and Test in Europe Conference and Exhibition》 | 2002年
76.Maximizing impossibilities for untestable fault indentification

机译：最大限度地减少不可判断的故障识别
- 作者：Hsiao M.S.;Institute of Electric and Electronic Engineer
- 会议名称：《Design, Automationj and Test in Europe Conference and Exhibition》 | 2002年
77.High-frequency nonlinear amplifier model for the efficient evaluation of inband distortion under nonlinear load-pull conditions

机译：高频非线性放大器模型，用于非线性负载拉伸条件下带内扭曲的高效评估
- 作者：Vandersteen G.;Verbeyst F.;Wambacq P.;Institute of Electric and Electronic Engineer
- 会议名称：《Design, Automationj and Test in Europe Conference and Exhibition》 | 2002年
78.Multiple-precision circuits allocation independent of data-objects length

机译：多重精度电路分配独立于数据对象长度
- 作者：Molina M.C.;Mendias J.M.;Hermida R.;Institute of Electric and Electronic Engineer
- 会议名称：《Design, Automationj and Test in Europe Conference and Exhibition》 | 2002年
79.Systematic design of a 200 MS/s 8-bit interpolating A/D converter

机译：系统设计200 ms / s 8位插入A / D转换器
- 作者：Vandenbussche J.;Lauwers E.;Uyttenhove K.;Institute of Electric and Electronic Engineer
- 会议名称：《Design, Automationj and Test in Europe Conference and Exhibition》 | 2002年
80.Hardware-assisted data compression for energy minimization in systems with embedded processors

机译：具有嵌入式处理器的系统中的能量最小化的硬件辅助数据压缩
- 作者：Benini L.;Bruni D.;Macii A.;Institute of Electric and Electronic Engineer
- 会议名称：《Design, Automationj and Test in Europe Conference and Exhibition》 | 2002年
81.Crosstalk alleviation for dynamic PLAs

机译：串扰减轻动态PLAS
- 作者：Tzyy-KuenTien;Shih-Chieh Chang;Tong-Kai Tsai;Institute of Electric and Electronic Engineer
- 会议名称：《Design, Automationj and Test in Europe Conference and Exhibition》 | 2002年
82.Parameter controlled automatic symbolic analysis of nonlinear analog circuits

机译：非线性模拟电路的参数控制自动符号分析
- 作者：Popp R.;Oehrnen J.;Hedrich L.;Institute of Electric and Electronic Engineer
- 会议名称：《Design, Automationj and Test in Europe Conference and Exhibition》 | 2002年
83.Generalized early evaluation in self-timed circuits

机译：自定时电路的广义早期评估
- 作者：Thornton M.A.;Fazel K.;Reese R.B.;Institute of Electric and Electronic Engineer
- 会议名称：《Design, Automationj and Test in Europe Conference and Exhibition》 | 2002年
84.Verifying clock schedules in the presence of cross talk

机译：在跨谈的存在下验证时钟时间表
- 作者：Hassoun S.;Cromer C.;Calvillo-Gamez E.;Institute of Electric and Electronic Engineer
- 会议名称：《Design, Automationj and Test in Europe Conference and Exhibition》 | 2002年
85.A mixed-signal design reuse methodology based on parametric behavioural models with non-ideal effects

机译：基于参数行为模型的混合信号设计重用方法，非理想效果
- 作者：Gines A.J.;Peralias E.;Rueda A.;Institute of Electric and Electronic Engineer
- 会议名称：《Design, Automationj and Test in Europe Conference and Exhibition》 | 2002年
86.Power-manageable scheduling technique for control dominated high-level synthesis

机译：用于控制主导高级合成的功率管理调度技术
- 作者：Chunhong Chen;Sarrafzadeh M.;Institute of Electric and Electronic Engineer
- 会议名称：《Design, Automationj and Test in Europe Conference and Exhibition》 | 2002年
87.Macromodeling of digital I/O ports for system EMC assessment

机译：用于系统EMC评估的数字I / O端口的Macromodeling
- 作者：Stievano I.S.;Chen Z.;Becker D.;Institute of Electric and Electronic Engineer
- 会议名称：《Design, Automationj and Test in Europe Conference and Exhibition》 | 2002年
88.Fast method to include parasitic coupling in circuit simulations

机译：在电路模拟中包括寄生耦合的快速方法
- 作者：Van Thielen B.L.A.;Vandenbosch G.A.E.;Institute of Electric and Electronic Engineer
- 会议名称：《Design, Automationj and Test in Europe Conference and Exhibition》 | 2002年
89.Bio-inspired analog VLSI design realizes programmable complex spatio-temporal dynamics on a single chip

机译：生物启发的模拟VLSI设计在单个芯片上实现可编程复杂的时空动态
- 作者：Carmona R.;Jimenez-Garrido F.;Dominguez-Castro R.;Institute of Electric and Electronic Engineer
- 会议名称：《Design, Automationj and Test in Europe Conference and Exhibition》 | 2002年
90.Taylor expansion diagrams: a compact, canonical representation with applications to symbolic verification

机译：泰勒展开图：一个紧凑，规范的典型表达，应用于象征性验证
- 作者：Ciesielski M.J.;Kalla P.;Zhihong Zeng;Institute of Electric and Electronic Engineer
- 会议名称：《Design, Automationj and Test in Europe Conference and Exhibition》 | 2002年
91.Library compatible C/sub eff/ for gate-level timing

机译：库兼容C / Sub Eff /用于门级定时
- 作者：Sheehan B.N.;Institute of Electric and Electronic Engineer
- 会议名称：《Design, Automationj and Test in Europe Conference and Exhibition》 | 2002年
92.A uml-based design methodology for real- time and embedded systems

机译：基于UML的实时和嵌入式系统的设计方法
- 作者：de Jong G.;Institute of Electric and Electronic Engineer
- 会议名称：《Design, Automationj and Test in Europe Conference and Exhibition》 | 2002年
93.Design technology for networked reconfigurable FPGA platforms

机译：网络化可重构FPGA平台设计技术
- 作者：Guccione S.;Verkest D.;Bolsens I.;Institute of Electric and Electronic Engineer
- 会议名称：《Design, Automationj and Test in Europe Conference and Exhibition》 | 2002年
94.Optimal transistor tapering for high-speed CMOS circuits

机译：高速CMOS电路的最佳晶体管逐渐变细
- 作者：Li Ding;Mazumder P.;Institute of Electric and Electronic Engineer
- 会议名称：《Design, Automationj and Test in Europe Conference and Exhibition》 | 2002年
95.A fitting approach to generate symbolic expressions for linear and nonlinear analog circuit performance characteristics

机译：一种拟合方法，用于生成线性和非线性模拟电路性能特征的象征性表达式
- 作者：Daems W.;Gielen G.;Sansen W.;Institute of Electric and Electronic Engineer
- 会议名称：《Design, Automationj and Test in Europe Conference and Exhibition》 | 2002年
96.Constructing symbolic models for the input/output behavior of periodically time-varying systems using harmonic transfer matrices

机译：使用谐波传输矩阵构建周期性时变量的输入/输出行为的符号模型
- 作者：Vanassche P.;Gielen G.;Sansen W.;Institute of Electric and Electronic Engineer
- 会议名称：《Design, Automationj and Test in Europe Conference and Exhibition》 | 2002年
97.Test structure for I/sub C/(V/sub BE/) parameter determination of low voltage applications

机译：用于I / SUB C /（V / SUB为/）参数测定低压应用的测试结构
- 作者：Rahajandraibe W.;Dufaza C.;Auvergne D.;Institute of Electric and Electronic Engineer
- 会议名称：《Design, Automationj and Test in Europe Conference and Exhibition》 | 2002年
98.Highly scalable dynamically reconfigurable systolic ring-architecture for DSP applications

机译：用于DSP应用的高度可扩展动态可重新配置的收缩圈架构
- 作者：Sassatelli G.;Torres L.;Benoit P.;Institute of Electric and Electronic Engineer
- 会议名称：《Design, Automationj and Test in Europe Conference and Exhibition》 | 2002年
99.A signature test framework for rapid production testing of RF circuits

机译：RF电路快速生产测试的签名测试框架
- 作者：Voorakaranam R.;Cherubal S.;Chatterjee A.;Institute of Electric and Electronic Engineer
- 会议名称：《Design, Automationj and Test in Europe Conference and Exhibition》 | 2002年
100.An adaptive dictionary encoding scheme for SOC data buses

机译：SoC数据总线的自适应词典编码方案
- 作者：Lv T.;Henkel J.;Lekatsas H.;Institute of Electric and Electronic Engineer
- 会议名称：《Design, Automationj and Test in Europe Conference and Exhibition》 | 2002年