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Innovative Architecture for Future Generation High-Performance Processors and Systems Conference

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1.Author Index

机译：作者索引
- 作者：Institute of Electric and Electronic Engineer
- 会议名称：《Innovative Architecture for Future Generation High-Performance Processors and Systems Conference》 | 2000年
2.Innovative Architecture for Future Generation High-Performance Processors and Systems

机译：未来一代高性能处理器和系统的创新架构
- 作者：Institute of Electric and Electronic Engineer
- 会议名称：《Innovative Architecture for Future Generation High-Performance Processors and Systems Conference》 | 2000年
3.Present status of development of the earth simulator

机译：地球模拟器的发展现状
- 作者：Mitsuo Yokokawa
- 会议名称：《Innovative Architecture for Future Generation High-Performance Processors and Systems Conference》 | 2000年
4.Wrapped system call in communication and execution fusion OS: CEFOS

机译：在通信和执行融合操作系统中呼叫包装系统：CEFO
- 作者：Hiroshi Nakayama;Takuya Tanabayashi;Makoto Amamiya
- 会议名称：《Innovative Architecture for Future Generation High-Performance Processors and Systems Conference》 | 2000年
5.Pipelined memory hierarchies: scalable organizations and application performance

机译：流水线内存层次结构：可扩展组织和应用程序性能
- 作者：Gianfranco Bilardi;Kattamuri Ekanadham;Pratap Pattnaik
- 会议名称：《Innovative Architecture for Future Generation High-Performance Processors and Systems Conference》 | 2000年
6.Cache coherence protocol for home proxy cache on RHiNET and its preliminary performance estimation

机译：RHINET上的家庭代理缓存的缓存一致性协议及其初步性能估算
- 作者：Hironori Nakajo;Masaaki Ishii;Junji Yamamoto;Tomohiro Kudo;Tomonori Yokoyama;Jun-ichiro Tsuchiya;Hideharu Amano
- 会议名称：《Innovative Architecture for Future Generation High-Performance Processors and Systems Conference》 | 2000年
7.An approach towards an analytical characterization of locality and its portability

机译：一种探讨局部性分析及其可移植性的方法
- 作者：Gianfranco Bilardi;Enoch Peserico
- 会议名称：《Innovative Architecture for Future Generation High-Performance Processors and Systems Conference》 | 2000年
8.Cache-In-Memory

机译：缓存内存
- 作者：Jason T. Zawodny;Peter M. Kogge
- 会议名称：《Innovative Architecture for Future Generation High-Performance Processors and Systems Conference》 | 2000年
9.Power reduction in superscalar datapaths through dynamic bit-slice activation

机译：通过动态位切片激活，SuperScalar DataPath的功率降低
- 作者：Dmitry Ponomarev;Gurhan Kucuk;Kanad Ghose
- 会议名称：《Innovative Architecture for Future Generation High-Performance Processors and Systems Conference》 | 2000年
10.An architecture of on-chip-memory multi-threading processor

机译：片上存储器多线程处理器的架构
- 作者：Takanori Matsuzaki;Hiroshi Tomiyasu;Makoto Amamiya
- 会议名称：《Innovative Architecture for Future Generation High-Performance Processors and Systems Conference》 | 2000年
11.Characteristics of loop unrolling effect: software pipelining and memory latency hiding

机译：环路展开效应特征：软件流水线和内存延迟隐藏
- 作者：Sato Hiroyuki;Yoshida Teruhiko
- 会议名称：《Innovative Architecture for Future Generation High-Performance Processors and Systems Conference》 | 2000年
12.Architectural and compiler strategies for dynamic power management in the COPPER project

机译：铜项目动态电力管理的建筑和编译策略
- 作者：Ana Azevedo;Radu Cornea;Ilya Issenin
- 会议名称：《Innovative Architecture for Future Generation High-Performance Processors and Systems Conference》 | 2000年
13.An efficient algorithm for pointer-to-array access conversion for compiling and optimizing DSP applications

机译：用于编译和优化DSP应用程序的指针到阵列访问转换的高效算法
- 作者：Robert A. Van Engelen;Kyle A. Gallivan
- 会议名称：《Innovative Architecture for Future Generation High-Performance Processors and Systems Conference》 | 2000年
14.Power efficient instruction cache for wide-issue processors

机译：用于广播处理器的功率高效指令缓存
- 作者：Ana-Maria Badulescu;Alexander Veidenbaum
- 会议名称：《Innovative Architecture for Future Generation High-Performance Processors and Systems Conference》 | 2000年