首页>外文会议>电子学、通信>IFIP TC10/WG10.5 Eleventh International Conference on Very Large Scale Integration of Systems-on-Chip (VLSI-SOC'01) Dec 3-5, 2001 Montpellier, France

IFIP TC10/WG10.5 Eleventh International Conference on Very Large Scale Integration of Systems-on-Chip (VLSI-SOC'01) Dec 3-5, 2001 Montpellier, France

召开年：
召开地：
出版时间：-

会议文集：-

会议论文

热门论文

全部论文

最新会议

更多>>

全选（0）

1.Interconnect Capacitance Modelling in a VDSM CMOS Technology

机译：VDSM CMOS技术中的互连电容建模
- 作者：David Bernard;Christian Landrault;Pascal Nouet
- 会议名称：《IFIP TC10/WG10.5 Eleventh International Conference on Very Large Scale Integration of Systems-on-Chip (VLSI-SOC'01) Dec 3-5, 2001 Montpellier, France》 | 2001年
- interconnects;
- capacitance;
- layout extraction;
- closed-form models;
2.Abstract Communication Model and Automatic Interface generation for IP integration in Hardware/Software Co-design

机译：硬件/软件协同设计中IP集成的抽象通信模型和自动接口生成
- 作者：C. Araujo;E. Barros
- 会议名称：《IFIP TC10/WG10.5 Eleventh International Conference on Very Large Scale Integration of Systems-on-Chip (VLSI-SOC'01) Dec 3-5, 2001 Montpellier, France》 | 2001年
3.A New Efficient VLSI Architecture for Full Search Block Matching Motion Estimation

机译：用于全搜索块匹配运动估计的新型高效VLSI架构
- 作者：Nuno Roma;Leonel Sousa
- 会议名称：《IFIP TC10/WG10.5 Eleventh International Conference on Very Large Scale Integration of Systems-on-Chip (VLSI-SOC'01) Dec 3-5, 2001 Montpellier, France》 | 2001年
- motion estimation;
- block matching;
- array architectures;
- specialized processors;
4.An Evolutionary Approach for Pareto-optimal Configurations in SOC Platforms

机译：SOC平台中Pareto最优配置的进化方法
- 作者：Giuseppe Ascia;Vincenzo Catania;Maurizio Palesi
- 会议名称：《IFIP TC10/WG10.5 Eleventh International Conference on Very Large Scale Integration of Systems-on-Chip (VLSI-SOC'01) Dec 3-5, 2001 Montpellier, France》 | 2001年
5.An Industrial Approach to Core-Based System Chip Testing

机译：基于内核的系统芯片测试的工业方法
- 作者：Erik Jan Marinissen
- 会议名称：《IFIP TC10/WG10.5 Eleventh International Conference on Very Large Scale Integration of Systems-on-Chip (VLSI-SOC'01) Dec 3-5, 2001 Montpellier, France》 | 2001年
- system chip;
- manufacturing test;
- test wrapper;
- test access mechanism;
- test expansion;
- test scheduling;
- macro test;
6.Built-in test of analog non-linear circuits in a SOC environment

机译：SOC环境中的模拟非线性电路的内置测试
- 作者：Luigi Carro;Andre C. Nacul;Daniel Janner;Marcelo Lubaszewski
- 会议名称：《IFIP TC10/WG10.5 Eleventh International Conference on Very Large Scale Integration of Systems-on-Chip (VLSI-SOC'01) Dec 3-5, 2001 Montpellier, France》 | 2001年
- analog built-in testing;
- non linear circuits (mixer;
- agc;
- peak-detector;
- log-amplifier);
- non linear adaptive filters;
7.An Object-Oriented Methodology for Modeling the Precise Behavior of Processor Architectures

机译：面向对象的方法论，为处理器体系结构的精确行为建模
- 作者：Joao Claudio Qtero;Flavio Rech Wagner
- 会议名称：《IFIP TC10/WG10.5 Eleventh International Conference on Very Large Scale Integration of Systems-on-Chip (VLSI-SOC'01) Dec 3-5, 2001 Montpellier, France》 | 2001年
- object-oriented hardware modeling;
- processor architectures;
- teaching environments;
- design environments;
8.Dynamically Reconfigurable Architectures for Digital Signal Processing Applications

机译：用于数字信号处理应用程序的动态可重新配置架构
- 作者：Gilles Sassatelli;Lionel Torres;Pascal Benoit;Gaston Cambon;Michel Robert;Jerome Galy
- 会议名称：《IFIP TC10/WG10.5 Eleventh International Conference on Very Large Scale Integration of Systems-on-Chip (VLSI-SOC'01) Dec 3-5, 2001 Montpellier, France》 | 2001年
- reconfigurable computing;
- data how;
- digital signal processing;
9.Feasible delay bound definition

机译：可行的延迟界限定义
- 作者：N. Azemard;M. Aline;P. Maurine;D. Auvergne
- 会议名称：《IFIP TC10/WG10.5 Eleventh International Conference on Very Large Scale Integration of Systems-on-Chip (VLSI-SOC'01) Dec 3-5, 2001 Montpellier, France》 | 2001年
- timing closure;
- delay bounds;
- fan out;
10.Impact of Technology Spreading on MEMS design Robustness

机译：技术传播对MEMS设计稳健性的影响
- 作者：V. Beroulle;L. Latorre;M. Dardalhon;C. Oudea;G. Perez;F. Pressecq;P. Nouet
- 会议名称：《IFIP TC10/WG10.5 Eleventh International Conference on Very Large Scale Integration of Systems-on-Chip (VLSI-SOC'01) Dec 3-5, 2001 Montpellier, France》 | 2001年
- MEMS;
- characterization;
- process scatterings;
11.Functional Test Generation Using Constraint Logic Programming

机译：使用约束逻辑编程进行功能测试
- 作者：Zhihong Zeng;Maciej Ciesielski;Bruno Rouzeyre
- 会议名称：《IFIP TC10/WG10.5 Eleventh International Conference on Very Large Scale Integration of Systems-on-Chip (VLSI-SOC'01) Dec 3-5, 2001 Montpellier, France》 | 2001年
- functional test generation;
- satisfiability;
- constraint logic programming;
- validation;
- verification;
12.Gate sizing for low power design

机译：栅极尺寸调整，可实现低功耗设计
- 作者：Philippe Maurine;Nadine Azemard;Daniel Auvergne
- 会议名称：《IFIP TC10/WG10.5 Eleventh International Conference on Very Large Scale Integration of Systems-on-Chip (VLSI-SOC'01) Dec 3-5, 2001 Montpellier, France》 | 2001年
- gate sizing;
- short circuit;
- power dissipation;
13.Low-Voltage Embedded-RAM Technology: Present and Future

机译：低压嵌入式RAM技术：现在和将来
- 作者：Kiyoo Itoh;Hiroyuki Mizuno
- 会议名称：《IFIP TC10/WG10.5 Eleventh International Conference on Very Large Scale Integration of Systems-on-Chip (VLSI-SOC'01) Dec 3-5, 2001 Montpellier, France》 | 2001年
- subthreshold current;
- gate tunneling current;
- DRAM;
- SRAM;
- peripheral circuits;
- gate-source backbias;
- dynamic V_T;
- multi-static V_T;
- power management;
- I_(DDQ) test;
- gain cells;
- memory-rich architectures;
14.Low-Voltage 0.25_μm CMOS Improved Power Adaptive Issue Queue For Embedded Microprocessors

机译：适用于嵌入式微处理器的低压0.25_μmCMOS改进型电源自适应问题队列
- 作者：Brian Curran;Mary Gifaldi;Jason Martin;Alper Buyuktosunoglu;Martin Margala;David Albonesi
- 会议名称：《IFIP TC10/WG10.5 Eleventh International Conference on Very Large Scale Integration of Systems-on-Chip (VLSI-SOC'01) Dec 3-5, 2001 Montpellier, France》 | 2001年
- low-voltage;
- power adaptive;
- issue queue;
- CMOS;
- embedded;
- architecture;
15.On-chip generator of a saw-tooth test stimulus for ADC BIST

机译：用于ADC BIST的锯齿测试激励的片内发生器
- 作者：F. Azaies;S. Bernard;Y. Bertrand;M. Renovell
- 会议名称：《IFIP TC10/WG10.5 Eleventh International Conference on Very Large Scale Integration of Systems-on-Chip (VLSI-SOC'01) Dec 3-5, 2001 Montpellier, France》 | 2001年
- ADC testing;
- BIST;
- analog stimulus generation;
16.Reconfigurable Architecture Using High Speed FPGA

机译：使用高速FPGA的可重配置架构
- 作者：L. Kessal;R. Bourguiba;D. Demigny;N. Boudouani;M. Karabernou
- 会议名称：《IFIP TC10/WG10.5 Eleventh International Conference on Very Large Scale Integration of Systems-on-Chip (VLSI-SOC'01) Dec 3-5, 2001 Montpellier, France》 | 2001年
- dynamic reconfiguration;
- run time reconfiguration;
- image processing;
- fpga;
17.Two ASIC for Low and Middle Levels of Real Time Image Processing

机译：中低层实时图像处理的两种ASIC
- 作者：P. Lamaty;B. Mazar;D.Demigny;L. Kessal;M. Karabernou
- 会议名称：《IFIP TC10/WG10.5 Eleventh International Conference on Very Large Scale Integration of Systems-on-Chip (VLSI-SOC'01) Dec 3-5, 2001 Montpellier, France》 | 2001年
- asic;
- image processing;
- edge detection;
- region labelling;
- polygonal approximation;
- edge chaining;
18.A Dynamically Reconfigurable Architecture for Low-Power Multimedia Terminals

机译：低功耗多媒体终端的动态可重配置架构
- 作者：Raphael David;Daniel Chillet;Sebastien Pillement;Olivier Sentieys
- 会议名称：《》 | 2001年
- reconfigurable architecture;
- high-performance;
- low-power;
- UMTS;
19.64 x 64 Pixels General Purpose Digital Vision Chip

机译：64 x 64像素通用数字视觉芯片
- 作者：Takashi Komuro;Masatoshi Ishikawa
- 会议名称：《IFIP TC10/WG10.5 Eleventh International Conference on Very Large Scale Integration of Systems-on-Chip (VLSI-SOC'01) Dec 3-5, 2001 Montpellier, France》 | 2001年
- vision chip;
- image sensor;
- parallel processing;
- visual feedback;
20.A VHDL-AMS Case Study: The Incremental Design of an Efficient 3rd generation MOS Model of a Deep Sub Micron Transistor

机译：VHDL-AMS案例研究：深亚微米晶体管的高效第三代MOS模型的增量设计
- 作者：C. Lallement;F. Pecheux;Y. Herve
- 会议名称：《IFIP TC10/WG10.5 Eleventh International Conference on Very Large Scale Integration of Systems-on-Chip (VLSI-SOC'01) Dec 3-5, 2001 Montpellier, France》 | 2001年
21.A Standardized Co-simulation Backbone

机译：标准化的协同仿真骨干网
- 作者：Braulio Adriano de Mello;Flavio Rech Wagner
- 会议名称：《IFIP TC10/WG10.5 Eleventh International Conference on Very Large Scale Integration of Systems-on-Chip (VLSI-SOC'01) Dec 3-5, 2001 Montpellier, France》 | 2001年
- distributed co-simulation;
- simulation backbone;
- cooperation;
- HLA;
22.A vision system on chip for industrial control: From light to smart vision

机译：用于工业控制的片上视觉系统：从照明到智能视觉
- 作者：Eric Senn;Eric Martin
- 会议名称：《IFIP TC10/WG10.5 Eleventh International Conference on Very Large Scale Integration of Systems-on-Chip (VLSI-SOC'01) Dec 3-5, 2001 Montpellier, France》 | 2001年
- vision system on chip;
- active pixel sensor;
- industrial control;
- motion detection;
- pattern recognition;
23.Automatic Code-Transformation and Architecture Refinement for Application-Specific Multiprocessor SoCs with Shared Memory

机译：具有共享内存的专用多处理器SoC的自动代码转换和体系结构优化
- 作者：Samy Meftali;Ferid Gharsalli;Frederic Rousseau;Ahmed. A. Jerraya
- 会议名称：《IFIP TC10/WG10.5 Eleventh International Conference on Very Large Scale Integration of Systems-on-Chip (VLSI-SOC'01) Dec 3-5, 2001 Montpellier, France》 | 2001年
- shared memory;
- code transformation;
- architecture refinement;
24.Design of a Branch-Based Carry-Select Adder IP Portable in 0.25 μm Bulk and Silicon-On-Insulator CMOS Technologies

机译：基于分支的进位选择加法器IP便携式0.25μm散装和绝缘硅CMOS技术的设计
- 作者：Amaury Neve;Denis Flandre
- 会议名称：《IFIP TC10/WG10.5 Eleventh International Conference on Very Large Scale Integration of Systems-on-Chip (VLSI-SOC'01) Dec 3-5, 2001 Montpellier, France》 | 2001年
- digital design;
- SOI technology;
- low voltage low power design;
25.Design of a Fast CMOS APS Imager for High Speed Laser Detections

机译：用于高速激光检测的快速CMOS APS成像仪的设计
- 作者：B. Casadei;J. P. Le Normand;Y. Hu;B. Cunin
- 会议名称：《IFIP TC10/WG10.5 Eleventh International Conference on Very Large Scale Integration of Systems-on-Chip (VLSI-SOC'01) Dec 3-5, 2001 Montpellier, France》 | 2001年
- CMOS sensors;
- noise analysis and optimisation;
- high time resolution imager;
26.CMOS Mixed-signal Circuits Design on a Digital Array Using Minimum Transistors

机译：使用最小晶体管的数字阵列上的CMOS混合信号电路设计
- 作者：Jung Hyun Choi;Sergio Bampi
- 会议名称：《IFIP TC10/WG10.5 Eleventh International Conference on Very Large Scale Integration of Systems-on-Chip (VLSI-SOC'01) Dec 3-5, 2001 Montpellier, France》 | 2001年
- TAT transistor;
- pre-diffused SOT array;
- analog and mixed-signal design;
- building blocks;
27.Design Technology for Systems-on-Chip

机译：片上系统设计技术
- 作者：Raul Camposano;Don MacMillen
- 会议名称：《IFIP TC10/WG10.5 Eleventh International Conference on Very Large Scale Integration of Systems-on-Chip (VLSI-SOC'01) Dec 3-5, 2001 Montpellier, France》 | 2001年
28.Design Considerations of a Low-Complexity, Low-Power Integer Turbo Decoder

机译：低复杂度，低功耗整数Turbo解码器的设计考虑因素
- 作者：Stephen M. Pisuk;Peter H. Wu
- 会议名称：《IFIP TC10/WG10.5 Eleventh International Conference on Very Large Scale Integration of Systems-on-Chip (VLSI-SOC'01) Dec 3-5, 2001 Montpellier, France》 | 2001年
29.Fast Recursive Implementation of the Gaussian Filter

机译：高斯滤波器的快速递归实现
- 作者：D.Demigny;L. Kessal;J. Pons
- 会议名称：《IFIP TC10/WG10.5 Eleventh International Conference on Very Large Scale Integration of Systems-on-Chip (VLSI-SOC'01) Dec 3-5, 2001 Montpellier, France》 | 2001年
- gaussian filter;
- recursive filter;
- polynomial filter;
30.Distributed Collaborative Design over Cave2 Framework

机译：Cave2框架上的分布式协同设计
- 作者：Leandro Soares Indrusiak;Juergen Becker;Manfred Glesner;Ricardo Augusto da Luz Reis
- 会议名称：《IFIP TC10/WG10.5 Eleventh International Conference on Very Large Scale Integration of Systems-on-Chip (VLSI-SOC'01) Dec 3-5, 2001 Montpellier, France》 | 2001年
31.Integration of Robustness in the Design of a Cell

机译：鲁棒性在电池设计中的集成
- 作者：J.M. Dutertre;F.M. Roche;G. Cathebras
- 会议名称：《IFIP TC10/WG10.5 Eleventh International Conference on Very Large Scale Integration of Systems-on-Chip (VLSI-SOC'01) Dec 3-5, 2001 Montpellier, France》 | 2001年
- robustness;
- radiation hardened design;
- reliability;
- single event upset;
- data latch;
32.High Performance Java Hardware Engine and Software Kernel for Embedded Systems

机译：嵌入式系统的高性能Java硬件引擎和软件内核
- 作者：Morgan Hirosuke Miki;Motoki Kimura;Takao Onoye;Isao Shirakawa
- 会议名称：《IFIP TC10/WG10.5 Eleventh International Conference on Very Large Scale Integration of Systems-on-Chip (VLSI-SOC'01) Dec 3-5, 2001 Montpellier, France》 | 2001年
- java;
- embedded system;
- hardware engine;
- software kernel;
33.Modeling Power Dynamics for an Embedded DSP Processor Core: An Empirical Model

机译：嵌入式DSP处理器内核的电源动力学建模：一个经验模型
- 作者：C.H.Gebotys;R.Muresan
- 会议名称：《IFIP TC10/WG10.5 Eleventh International Conference on Very Large Scale Integration of Systems-on-Chip (VLSI-SOC'01) Dec 3-5, 2001 Montpellier, France》 | 2001年
- power;
- DSP;
- current;
- model;
- energy;
34.Modeling and design of asynchronous priority arbiters for on-chip communication systems

机译：片上通信系统异步优先级仲裁器的建模和设计
- 作者：J-B. Rigaud;J. Quartana;L. Fesquet;M. Renaudin
- 会议名称：《IFIP TC10/WG10.5 Eleventh International Conference on Very Large Scale Integration of Systems-on-Chip (VLSI-SOC'01) Dec 3-5, 2001 Montpellier, France》 | 2001年
- asynchronous systems;
- priority arbiters;
- high-level modeling;
- CHP language;
- QDI circuits;
35.Power Consumption Model for the DSP OAK Processor

机译：DSP OAK处理器的功耗模型
- 作者：Guitton-Ouhamou Patricia;Belleudy Cecile;Auguin Michel
- 会议名称：《IFIP TC10/WG10.5 Eleventh International Conference on Very Large Scale Integration of Systems-on-Chip (VLSI-SOC'01) Dec 3-5, 2001 Montpellier, France》 | 2001年
- DSP processor;
- power consumption model;
36.Power-constrained Test Scheduling for SoCs under a 'no session' scheme

机译：“无会话”方案下针对SoC的功耗受限的测试计划
- 作者：Marie-Lise Rottes;Mien Pouget;Bruno Rouzeyre
- 会议名称：《IFIP TC10/WG10.5 Eleventh International Conference on Very Large Scale Integration of Systems-on-Chip (VLSI-SOC'01) Dec 3-5, 2001 Montpellier, France》 | 2001年
- system-on-chip;
- test scheduling;
37.Noise optimisation of a piezoresistive CMOS MEMS for magnetic field sensing

机译：用于磁场感应的压阻CMOS MEMS的噪声优化
- 作者：Vincent Beroulle;Yves Bertrand;Laurent Latorre;Pascal Nouet
- 会议名称：《IFIP TC10/WG10.5 Eleventh International Conference on Very Large Scale Integration of Systems-on-Chip (VLSI-SOC'01) Dec 3-5, 2001 Montpellier, France》 | 2001年
- CMOS MEMS;
- magnetic sensor;
- noise;
38.Speeding Up Verification of RTL Designs by Computing One-to-One Abstractions with Reduced Signal Widths

机译：通过计算减小的信号宽度的一对一抽象来加快RTL设计的验证
- 作者：Peer Johannsen;Rolf Drechsler
- 会议名称：《IFIP TC10/WG10.5 Eleventh International Conference on Very Large Scale Integration of Systems-on-Chip (VLSI-SOC'01) Dec 3-5, 2001 Montpellier, France》 | 2001年
39.Random Adjacent Sequences: An Efficient Solution for Logic BIST

机译：随机相邻序列：逻辑BIST的有效解决方案
- 作者：Rene David;Patrick Girard;Christian Landrault;Serge Pravossoudovitch;Arnaud Virazel
- 会议名称：《IFIP TC10/WG10.5 Eleventh International Conference on Very Large Scale Integration of Systems-on-Chip (VLSI-SOC'01) Dec 3-5, 2001 Montpellier, France》 | 2001年
- BIST;
- stuck-at fault;
- bridging fault;
- delay fault;
- universal sequence;